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LPFFIR Project README
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README
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This file is part of the LowPass Filter with Finite Impulse Response (LPFFIR) project:
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https://opencores.org/projects/lpffir
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AUTHOR:
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Vladimir Armstrong, vladimirarmstrong@opencores.org
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DESCRIPTION:
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Implementation of LPFFIR according to specification document:
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./doc/LPFFIR_Specifications.pdf
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DIRECTORY STRUCTURE:
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DIRECTORY STRUCTURE:
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── bench Top level test bench
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── bench Top level test bench
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│ ├── systemc For SystemC sources
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│ ├── systemc For SystemC sources
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│ └── verilog For verilog sources
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│ └── verilog For verilog sources
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│
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│
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├── doc Specification, design, verification and other PDF documents
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├── doc Specification and other PDF documents
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│ └── src Source version of all documents (Microsoft Word, Microsoft Visio)
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│ └── src Source version of all documents (Microsoft Word, Microsoft Visio)
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│
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│
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├── rtl Verilog RTL sources
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├── rtl Verilog RTL sources
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│
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│
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├── sim Top level simulations
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├── sim Top level simulations
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2. SystemC 2.3.2-Accellera SystemC test bench simulator
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2. SystemC 2.3.2-Accellera SystemC test bench simulator
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3. Verilator Verilog simulator
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3. Verilator Verilog simulator
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4. GTKWave Verilog simulation waveform viewer
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4. GTKWave Verilog simulation waveform viewer
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5. GNU Octave Octave syntax is largely compatible with MATLAB
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5. GNU Octave Octave syntax is largely compatible with MATLAB
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6. Python RTL-simulation vs. MATLAB-expected check script
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6. Python RTL-simulation vs. MATLAB-expected check script
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TO DO:
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1. Create Magnitude Response test of lpffir_core.sv with expected behavior of specification document Appendix B.
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2. Create Phase Response test of lpffir_core.sv with expected behavior of specification document Appendix B.
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