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https://opencores.org/ocsvn/lwrisc/lwrisc/trunk
[/] [lwrisc/] [trunk/] [RTL/] [mem_man.v] - Diff between revs 11 and 14
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Rev 11 |
Rev 14 |
Line 33... |
Line 33... |
output co,
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output co,
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output [1:0] bank,
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output [1:0] bank,
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input [7:0] din ,
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input [7:0] din ,
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output reg [7:0]status ,
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output reg [7:0]status ,
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input [6:0] rd_addr,
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input [7:0] rd_addr, //[6:0]Should be also OK,For there is only 128byte RAM
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input [6:0] wr_addr ,
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input [7:0] wr_addr , //[6:0]Should be also OK,For there is only 128byte RAM
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input [7:0] in0,
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input [7:0] in0,
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input [7:0] in1,
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input [7:0] in1,
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output reg [7:0] out0,
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output reg [7:0] out0,
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output reg [7:0] out1
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output reg [7:0] out1
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);
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);
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reg wr_en_r;
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reg wr_en_r;
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reg [6:0] din_r, wr_addr_r;
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reg [7:0] din_r, wr_addr_r;
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reg [6:0] rd_addr_r;
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reg [7:0] rd_addr_r;
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always @(posedge clk)
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always @(posedge clk)
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begin //used to bypass the data
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begin //used to bypass the data
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//which wrote anf then be read in the followwing period
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//which wrote anf then be read in the followwing period
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wr_addr_r<=wr_addr;
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wr_addr_r<=wr_addr;
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