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https://opencores.org/ocsvn/lxp32/lxp32/trunk
[/] [lxp32/] [trunk/] [rtl/] [lxp32_scratchpad.vhd] - Diff between revs 2 and 6
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Rev 2 |
Rev 6 |
Line 40... |
Line 40... |
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-- RAM 1
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-- RAM 1
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ram_inst1: entity work.lxp32_ram256x32(rtl)
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ram_inst1: entity work.lxp32_ram256x32(rtl)
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port map(
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port map(
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wclk_i=>clk_i,
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clk_i=>clk_i,
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we_i=>we_i,
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we_i=>we_i,
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waddr_i=>waddr_i,
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waddr_i=>waddr_i,
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wdata_i=>wdata_i,
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wdata_i=>wdata_i,
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rclk_i=>clk_i,
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re_i=>'1',
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re_i=>'1',
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raddr_i=>raddr1_i,
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raddr_i=>raddr1_i,
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rdata_o=>ram1_rdata
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rdata_o=>ram1_rdata
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);
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);
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-- RAM 2
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-- RAM 2
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ram_inst2: entity work.lxp32_ram256x32(rtl)
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ram_inst2: entity work.lxp32_ram256x32(rtl)
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port map(
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port map(
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wclk_i=>clk_i,
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clk_i=>clk_i,
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we_i=>we_i,
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we_i=>we_i,
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waddr_i=>waddr_i,
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waddr_i=>waddr_i,
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wdata_i=>wdata_i,
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wdata_i=>wdata_i,
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rclk_i=>clk_i,
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re_i=>'1',
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re_i=>'1',
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raddr_i=>raddr2_i,
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raddr_i=>raddr2_i,
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rdata_o=>ram2_rdata
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rdata_o=>ram2_rdata
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);
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);
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