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---------------------------------------------------------------------
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---------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use work.common_pkg.all;
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entity program_ram is
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entity program_ram is
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generic(
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generic(
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THROTTLE: boolean
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THROTTLE: boolean
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);
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);
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port(
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port(
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end generate;
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end generate;
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process (clk_i) is
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process (clk_i) is
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begin
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begin
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if rising_edge(clk_i) then
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if rising_edge(clk_i) then
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ack_read<=wbs_cyc_i and wbs_stb_i and not wbs_we_i;
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ack_read<=wbs_cyc_i and wbs_stb_i and not wbs_we_i and not ack_read;
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end if;
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end if;
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end process;
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end process;
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ack_write<=wbs_cyc_i and wbs_stb_i and wbs_we_i;
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ack_write<=wbs_cyc_i and wbs_stb_i and wbs_we_i;
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wbs_ack_o<=ack_read or ack_write;
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wbs_ack_o<=ack_read or ack_write;
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wbs_dat_o<=ram_a_rdata;
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wbs_dat_o<=ram_a_rdata;
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-- Low Latency Interface (with optional pseudo-random throttling)
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-- Low Latency Interface (with optional pseudo-random throttling)
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process (clk_i) is
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begin
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if rising_edge(clk_i) then
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assert lli_re_i='0' or lli_adr_i(lli_adr_i'high downto 14)=X"0000"
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report "Attempted to fetch instruction from a non-existent address 0x"&
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hex_string(lli_adr_i&"00")
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severity failure;
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end if;
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end process;
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gen_throttling: if THROTTLE generate
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gen_throttling: if THROTTLE generate
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throttle_inst: entity work.scrambler(rtl)
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throttle_inst: entity work.scrambler(rtl)
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generic map(TAP1=>9,TAP2=>11)
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generic map(TAP1=>9,TAP2=>11)
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port map(clk_i=>clk_i,rst_i=>rst_i,ce_i=>'1',d_o=>prbs);
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port map(clk_i=>clk_i,rst_i=>rst_i,ce_i=>'1',d_o=>prbs);
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end generate;
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end generate;
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