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[/] [m1_core/] [trunk/] [hdl/] [filelist.dc] - Diff between revs 54 and 58

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# Synthesis script for dc_shell (Tcl mode)
# Synthesis script for dc_shell (Tcl mode)
 
 
# Analyze
# Analyze
 
 
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_alu.v
analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_alu.v
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_mul.v
analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_mul.v
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_div.v
analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_div.v
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_cpu.v
analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_cpu.v
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_mmu.v
analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_mmu.v
analyze -format verilog ~/m1_core/hdl/rtl/m1_core/m1_core.v
analyze -format verilog ~/m1_core/trunk/hdl/rtl/m1_core/trunk/m1_core.v
 
 
# Technology-independent elaboration and linking
# Technology-independent elaboration and linking
 
 
set active_design m1_core
set active_design m1_core
elaborate $active_design
elaborate $active_design

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