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//
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//
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// This file is part of the M32632 project
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// This file is part of the M32632 project
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// http://opencores.org/project,m32632
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// http://opencores.org/project,m32632
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//
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//
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// Filename: DATENPFAD.v
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// Filename: DATENPFAD.v
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// Version: 1.0
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// Version: 1.1 bug fix
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// Date: 30 May 2015
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// History: 1.0 first release of 30 Mai 2015
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// Date: 7 October 2015
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//
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//
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// Copyright (C) 2015 Udo Moeller
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// Copyright (C) 2015 Udo Moeller
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//
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//
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// This source file may be used and distributed without
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// This source file may be used and distributed without
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// restriction provided that this copyright statement is not
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// restriction provided that this copyright statement is not
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//
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//
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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|
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module DATENPFAD( BCLK, BRESET, WREN, IO_READY, LD_DIN, LD_IMME, WR_REG, IC_USER, ACC_FELD, ACC_STAT, DIN, DISP, IC_TEX,
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module DATENPFAD( BCLK, BRESET, WREN, IO_READY, LD_DIN, LD_IMME, WR_REG, IC_USER, ACC_FELD, ACC_STAT, DIN, DISP, IC_TEX,
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IMME_Q, INFO_AU, LD_OUT, DETOIP, MMU_UPDATE, OPER, PC_ARCHI, PC_ICACHE, RDAA, RDAB, START, WMASKE,
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IMME_Q, INFO_AU, LD_OUT, DETOIP, MMU_UPDATE, OPER, PC_ARCHI, PC_ICACHE, RDAA, RDAB, START, WMASKE,
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WRADR, DONE, Y_INIT, WRITE_OUT, READ_OUT, ZTEST, RMW, ACC_DONE, REG_OUT, PTB_SEL, PTB_WR, ACB_ZERO,
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WRADR, DONE, Y_INIT, WRITE_OUT, READ_OUT, ZTEST, RMW, QWATWO, ACC_DONE, REG_OUT, PTB_SEL, PTB_WR, ACB_ZERO,
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ABORT, SAVE_PC, CFG, CINV, DP_Q, IVAR, MCR, PACKET, PC_NEW, PSR, SIZE, STRING, TRAPS, VADR, RWVFLAG,
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ABORT, SAVE_PC, CFG, CINV, DP_Q, IVAR, MCR, PACKET, PC_NEW, PSR, SIZE, STRING, TRAPS, VADR, RWVFLAG,
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DBG_HIT, DBG_IN, COP_GO, COP_OP, COP_IN, COP_DONE, COP_OUT);
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DBG_HIT, DBG_IN, COP_GO, COP_OP, COP_IN, COP_DONE, COP_OUT);
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input BCLK;
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input BCLK;
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input BRESET;
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input BRESET;
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output Y_INIT;
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output Y_INIT;
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output WRITE_OUT;
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output WRITE_OUT;
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output READ_OUT;
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output READ_OUT;
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output ZTEST;
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output ZTEST;
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output RMW;
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output RMW;
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output QWATWO;
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output ACC_DONE;
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output ACC_DONE;
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output REG_OUT;
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output REG_OUT;
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output PTB_SEL;
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output PTB_SEL;
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output PTB_WR;
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output PTB_WR;
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output reg ACB_ZERO;
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output reg ACB_ZERO;
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| Line 299... |
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.PACKET(PACKET),
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.PACKET(PACKET),
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.SIZE(SIZE),
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.SIZE(SIZE),
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.VADR(VADR),
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.VADR(VADR),
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.ZTEST(ZTEST),
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.ZTEST(ZTEST),
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.RMW(RMW),
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.RMW(RMW),
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.QWATWO(QWATWO),
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.OP_RMW(INFO_AU[4]),
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.OP_RMW(INFO_AU[4]),
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.PHASE_17(INFO_AU[5]),
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.PHASE_17(INFO_AU[5]),
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.NO_TRAP(INFO_AU[6]) );
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.NO_TRAP(INFO_AU[6]) );
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CONFIG_REGS CFG_DBG(
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CONFIG_REGS CFG_DBG(
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