| Line 33... |
Line 33... |
// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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//
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//
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// Modules contained in this file:
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// Modules contained in this file:
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// M32632 The top level of M32632
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// M32632 The top level of M32632
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//
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//
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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|
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module M32632( BCLK, MCLK, WRCFG, BRESET, NMI_N, INT_N, STATUS, ILO, STATSIGS,
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module M32632( BCLK, MCLK, WRCFG, BRESET, NMI_N, INT_N, STATUS, ILO, STATSIGS,
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IO_WR, IO_RD, IO_A, IO_BE, IO_DI, IO_Q, IO_READY,
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IO_WR, IO_RD, IO_A, IO_BE, IO_DI, IO_Q, IO_READY,
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ENDRAM, IC_MDONE, DC_MDONE, ENWR, WAMUX, WADDR, DRAM_Q, DWCTRL, IWCTRL,
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ENDRAM, IC_MDONE, DC_MDONE, ENWR, WAMUX, WADDR, DRAM_Q, DWCTRL, IWCTRL,
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IC_ACC, IDRAM_ADR, DC_ACC, DC_WR, DRAM_ADR, DRAM_DI,
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IC_ACC, IDRAM_ADR, DC_ACC, DC_WR, DRAM_ADR, DRAM_DI,
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| Line 170... |
Line 170... |
wire ILO_SIG;
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wire ILO_SIG;
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wire [1:0] PTE_STAT;
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wire [1:0] PTE_STAT;
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wire DBG_HIT;
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wire DBG_HIT;
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wire [40:2] DBG_IN;
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wire [40:2] DBG_IN;
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|
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// The Data Cache
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// The Data Cache
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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DCACHE ARMS(
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DCACHE ARMS(
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.MCLK(MCLK),
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.MCLK(MCLK),
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.BCLK(BCLK),
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.BCLK(BCLK),
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.WRCFG(WRCFG),
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.WRCFG(WRCFG),
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.BRESET(BRESET),
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.BRESET(BRESET),
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| Line 232... |
Line 232... |
.KOLLI_A(KOLLI_A),
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.KOLLI_A(KOLLI_A),
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.MMU_DIN(MMU_DIN),
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.MMU_DIN(MMU_DIN),
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.RWVAL(RWVAL),
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.RWVAL(RWVAL),
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.RWVFLAG(RWVFLAG));
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.RWVFLAG(RWVFLAG));
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|
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// The Datapath
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// The Datapath
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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DATENPFAD STOMACH(
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DATENPFAD STOMACH(
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.WREN(WREN_REG),
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.WREN(WREN_REG),
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.BRESET(BRESET),
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.BRESET(BRESET),
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.BCLK(BCLK),
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.BCLK(BCLK),
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.IO_READY(D_IORDY),
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.IO_READY(D_IORDY),
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| Line 296... |
Line 296... |
.COP_OP(COP_OP),
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.COP_OP(COP_OP),
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.COP_IN(COP_IN),
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.COP_IN(COP_IN),
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.COP_GO(COP_GO),
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.COP_GO(COP_GO),
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.COP_OUT(COP_OUT));
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.COP_OUT(COP_OUT));
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|
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// The Instruction Cache
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// The Instruction Cache
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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ICACHE LEGS(
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ICACHE LEGS(
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.MCLK(MCLK),
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.MCLK(MCLK),
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.BCLK(BCLK),
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.BCLK(BCLK),
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.BRESET(BRESET),
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.BRESET(BRESET),
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.PTB_WR(PTB_WR),
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.PTB_WR(PTB_WR),
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| Line 341... |
Line 341... |
.ICTODC(ICTODC),
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.ICTODC(ICTODC),
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.ENA_HK(ENA_HK),
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.ENA_HK(ENA_HK),
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.STOP_CINV(STOP_CINV),
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.STOP_CINV(STOP_CINV),
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.IO_A(I_IOA));
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.IO_A(I_IOA));
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|
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// The Control Unit
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// The Control Unit
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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STEUERUNG BRAIN(
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STEUERUNG BRAIN(
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.BCLK(BCLK),
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.BCLK(BCLK),
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.BRESET(BRESET),
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.BRESET(BRESET),
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.DC_ACC_DONE(ACC_DONE),
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.DC_ACC_DONE(ACC_DONE),
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.ACB_ZERO(ACB_ZERO),
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.ACB_ZERO(ACB_ZERO),
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| Line 395... |
Line 395... |
.STOP_CINV(STOP_CINV),
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.STOP_CINV(STOP_CINV),
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.COP_OP(COP_OP),
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.COP_OP(COP_OP),
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.ILO(ILO_SIG),
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.ILO(ILO_SIG),
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.RWVAL(RWVAL));
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.RWVAL(RWVAL));
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|
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// The Input/Output Interface
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// The Input/Output Interface
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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IO_SWITCH ISWITCH(
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IO_SWITCH ISWITCH(
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.I_IORD(I_IORD),
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.I_IORD(I_IORD),
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.D_IOWR(D_IOWR),
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.D_IOWR(D_IOWR),
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.IO_READY(IO_READY),
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.IO_READY(IO_READY),
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.D_IORD(D_IORD),
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.D_IORD(D_IORD),
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| Line 420... |
Line 420... |
.ILO(ILO),
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.ILO(ILO),
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.IO_A(IO_A),
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.IO_A(IO_A),
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.DCWACC({DC_WR,DC_ACC}),
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.DCWACC({DC_WR,DC_ACC}),
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.STATUS(STATUS));
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.STATUS(STATUS));
|
|
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// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
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// The Statistic Signal Generator
|
// The Statistic Signal Generator
|
// +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
// ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
MAKE_STAT MKSTAT(
|
MAKE_STAT MKSTAT(
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.BCLK(BCLK),
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.BCLK(BCLK),
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.READ(READ),
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.READ(READ),
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.DACC_OK(ACC_STAT[0]),
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.DACC_OK(ACC_STAT[0]),
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.KOLLISION(KOLLISION),
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.KOLLISION(KOLLISION),
|
