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https://opencores.org/ocsvn/m32632/m32632/trunk
[/] [m32632/] [trunk/] [rtl/] [M32632.v] - Diff between revs 29 and 48
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| Rev 29 |
Rev 48 |
| Line 2... |
Line 2... |
//
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//
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// This file is part of the M32632 project
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// This file is part of the M32632 project
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// http://opencores.org/project,m32632
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// http://opencores.org/project,m32632
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//
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//
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// Filename: M32632.v
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// Filename: M32632.v
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// Version: 3.0 Cache Interface reworked
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// Project: M32632
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// History: 2.1 bug fix of 26 November 2016
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// Version: 3.1 bug fix of 25 February 2019
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// History: 3.0 Cache Interface reworked
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// 2.1 bug fix of 26 November 2016
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// 2.0 50 MHz release of 14 August 2016
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// 2.0 50 MHz release of 14 August 2016
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// 1.1 bug fix of 7 October 2015
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// 1.1 bug fix of 7 October 2015
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// 1.0 first release of 30 Mai 2015
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// 1.0 first release of 30 Mai 2015
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// Date: 2 December 2018
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// Author: Udo Moeller
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// Date: 8 July 2017
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//
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//
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// Copyright (C) 2018 Udo Moeller
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// Copyright (C) 2019 Udo Moeller
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//
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//
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// This source file may be used and distributed without
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// This source file may be used and distributed without
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// restriction provided that this copyright statement is not
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// restriction provided that this copyright statement is not
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// removed from the file and that any derivative work contains
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// removed from the file and that any derivative work contains
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// the original copyright notice and the associated disclaimer.
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// the original copyright notice and the associated disclaimer.
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| Line 111... |
Line 114... |
wire IC_USER;
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wire IC_USER;
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wire [31:12] IC_VA;
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wire [31:12] IC_VA;
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wire [3:0] ICTODC;
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wire [3:0] ICTODC;
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wire [6:0] INFO_AU;
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wire [6:0] INFO_AU;
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wire [1:0] IVAR;
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wire [1:0] IVAR;
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wire IVAR_MUX;
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wire KDET;
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wire KDET;
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wire [28:4] KOLLI_A;
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wire [28:4] KOLLI_A;
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wire [3:0] MCR;
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wire [3:0] MCR;
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wire [23:0] MMU_DIN;
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wire [23:0] MMU_DIN;
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wire [11:0] PSR;
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wire [11:0] PSR;
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| Line 280... |
Line 284... |
.SAVE_PC(SAVE_PC),
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.SAVE_PC(SAVE_PC),
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.CFG(CFG),
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.CFG(CFG),
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.CINV(CINV),
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.CINV(CINV),
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.DP_Q(DP_Q),
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.DP_Q(DP_Q),
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.IVAR(IVAR),
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.IVAR(IVAR),
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.IVAR_MUX(IVAR_MUX),
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.MCR(MCR),
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.MCR(MCR),
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.PACKET(PACKET),
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.PACKET(PACKET),
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.PC_NEW(PC_NEW),
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.PC_NEW(PC_NEW),
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.PSR(PSR),
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.PSR(PSR),
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.SIZE(SIZE),
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.SIZE(SIZE),
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| Line 321... |
Line 326... |
.DRAM_Q(DRAM_Q),
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.DRAM_Q(DRAM_Q),
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.CINVAL(CINV[3:2]),
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.CINVAL(CINV[3:2]),
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.IC_SIGS(IC_SIGS),
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.IC_SIGS(IC_SIGS),
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.IO_Q(IO_Q),
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.IO_Q(IO_Q),
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.IVAR(IVAR),
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.IVAR(IVAR),
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.IVAR_MUX(IVAR_MUX),
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.VADR_D(VADR[31:12]),
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.KOLLI_A(KOLLI_A),
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.KOLLI_A(KOLLI_A),
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.MCR_FLAGS(MCR),
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.MCR_FLAGS(MCR),
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.MMU_DIN(MMU_DIN),
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.MMU_DIN(MMU_DIN),
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.VADR(PC_ICACHE),
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.VADR_I(PC_ICACHE),
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.INHIBIT(IC_INHIBIT),
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.INHIBIT(IC_INHIBIT),
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.DRAM_ACC(IC_ACC),
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.DRAM_ACC(IC_ACC),
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.IO_RD(I_IORD),
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.IO_RD(I_IORD),
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.INIT_RUN(IC_INIT),
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.INIT_RUN(IC_INIT),
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.PROT_ERROR(PROT_ERROR),
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.PROT_ERROR(PROT_ERROR),
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