OpenCores
URL https://opencores.org/ocsvn/mcs-4/mcs-4/trunk

Subversion Repositories mcs-4

[/] [mcs-4/] [trunk/] [rtl/] [verilog/] [i4004/] [instruction_decode.v] - Diff between revs 6 and 7

Show entire file | Details | Blame | View Log

Rev 6 Rev 7
Line 178... Line 178...
    reg  n0405;
    reg  n0405;
    always @(posedge sysclk) begin
    always @(posedge sysclk) begin
        if (clk2)
        if (clk2)
            n0405 <= n0413;
            n0405 <= n0413;
    end
    end
    always @(*) begin
    always @(posedge sysclk) begin
        if (clk1)
        if (clk1)
            n0397 <= ~n0405;
            n0397 <= ~n0405;
    end
    end
    assign cn_n = ~n0397;
    assign cn_n = ~n0397;
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.