URL
https://opencores.org/ocsvn/mcu8/mcu8/trunk
[/] [mcu8/] [trunk/] [src/] [alu.vhd] - Diff between revs 7 and 13
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
| Rev 7 |
Rev 13 |
| Line 22... |
Line 22... |
-- vector for add operation
|
-- vector for add operation
|
VARIABLE a_add_int, b_add_int : STD_LOGIC_VECTOR(d_bus_width DOWNTO 0);
|
VARIABLE a_add_int, b_add_int : STD_LOGIC_VECTOR(d_bus_width DOWNTO 0);
|
begin
|
begin
|
a_add_int := '0' & a;
|
a_add_int := '0' & a;
|
b_add_int := '0' & b;
|
b_add_int := '0' & b;
|
result <= result_int;
|
|
|
|
case control is
|
case control is
|
when neg_s => result_int := NOT a;
|
when neg_s => result_int := NOT a;
|
carry_out <= carry;
|
carry_out <= carry;
|
IF result_int=zero_bus then
|
IF result_int=zero_bus then
|
| Line 110... |
Line 109... |
END IF;
|
END IF;
|
when others => result_int := a;
|
when others => result_int := a;
|
carry_out <= carry;
|
carry_out <= carry;
|
zero_out <= zero;
|
zero_out <= zero;
|
end case;
|
end case;
|
|
result <= result_int;
|
end process;
|
end process;
|
end behavioral;
|
end behavioral;
|
|
|
|
|
|
|
No newline at end of file
|
No newline at end of file
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.