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https://opencores.org/ocsvn/mdct/mdct/trunk
[/] [mdct/] [trunk/] [source/] [DBUFCTL.VHD] - Diff between revs 24 and 27
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| Rev 24 |
Rev 27 |
| Line 49... |
Line 49... |
memswitchwr <= memswitchwr_reg;
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memswitchwr <= memswitchwr_reg;
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memswitchrd <= memswitchrd_reg;
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memswitchrd <= memswitchrd_reg;
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memswitchrd_reg <= rmemsel;
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memswitchrd_reg <= rmemsel;
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MEM_SWITCH : process(clk)
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MEM_SWITCH : process(clk,rst)
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begin
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begin
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if clk = '1' and clk'event then
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if rst = '1' then
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if rst = '1' then
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memswitchwr_reg <= '0'; -- initially mem 1 is selected
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memswitchwr_reg <= '0'; -- initially mem 1 is selected
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dataready <= '0';
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dataready <= '0';
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else
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elsif clk = '1' and clk'event then
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memswitchwr_reg <= wmemsel;
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memswitchwr_reg <= wmemsel;
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if wmemsel /= memswitchwr_reg then
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if wmemsel /= memswitchwr_reg then
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dataready <= '1';
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dataready <= '1';
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end if;
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end if;
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if datareadyack = '1' then
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if datareadyack = '1' then
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dataready <= '0';
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dataready <= '0';
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end if;
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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end RTL;
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end RTL;
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