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[/] [mdct/] [trunk/] [source/] [testbench/] [CLKGEN.VHD] - Diff between revs 2 and 18

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Rev 2 Rev 18
Line 22... Line 22... 
library IEEE;
 
library IEEE;
 
  use IEEE.STD_LOGIC_1164.all;
 
  use IEEE.STD_LOGIC_1164.all;
 
  use ieee.numeric_std.all;
 
  use ieee.numeric_std.all;
 
 
 
 
 
library WORK;
 
library WORK;
 
  use WORK.MDCT_PKG.all;
 
  use WORK.MDCTTB_PKG.all;
 
 
 
 
 
entity CLKGEN is
 
entity CLKGEN is
 
  port (
 
  port (
 
        clk               : out STD_LOGIC
 
        clk               : out STD_LOGIC
 
       );
 
       );

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