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[/] [mem_ctrl/] [trunk/] [bench/] [verilog/] [sram_models/] [MicronSRAM/] [mt58l1my18d.v] - Diff between revs 4 and 23

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Rev 4 Rev 23
Line 98... Line 98... 
 
 
 
 
task mem_fill;
 
task mem_fill;
 
input   x;
 
input   x;
 
 
 
 
 
integer         a, n, x;
 
integer         a, n, x;
 
 
 
reg     [15:0]   data;
 
begin
 
begin
 
 
 
 
 
a=0;
 
a=0;
 
for(n=0;n<x;n=n+1)
 
for(n=0;n<x;n=n+1)
 
   begin
 
   begin
 
        bank0[n] = a;
 
        data = a;
 
        bank1[n] = a+1;
 
        bank0[n] = { ^data[15:8], data[15:8], ^data[7:0], data[7:0]};
 
 
 
        data = a+1;
 
 
 
        bank1[n] = { ^data[15:8], data[15:8], ^data[7:0], data[7:0]};
 
        a=a+2;
 
        a=a+2;
 
   end
 
   end
 
 
 
 
 
end
 
end
 
endtask
 
endtask

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