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[/] [mem_ctrl/] [trunk/] [rtl/] [verilog/] [mc_rd_fifo.v] - Diff between revs 4 and 16
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: mc_rd_fifo.v,v 1.1 2001-07-29 07:34:41 rudi Exp $
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// $Id: mc_rd_fifo.v,v 1.2 2001-11-29 02:16:28 rudi Exp $
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//
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//
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// $Date: 2001-07-29 07:34:41 $
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// $Date: 2001-11-29 02:16:28 $
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// $Revision: 1.1 $
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// $Revision: 1.2 $
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// $Author: rudi $
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// $Author: rudi $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.1 2001/07/29 07:34:41 rudi
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//
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// 1) Changed Directory Structure
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// 2) Fixed several minor bugs
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//
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// Revision 1.1.1.1 2001/05/13 09:39:44 rudi
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// Revision 1.1.1.1 2001/05/13 09:39:44 rudi
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// Created Directory Structure
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// Created Directory Structure
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//
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Line 96... |
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always @(posedge clk)
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always @(posedge clk)
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if(we & wr_adr[3]) r3 <= #1 din;
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if(we & wr_adr[3]) r3 <= #1 din;
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always @(rd_adr or r0 or r1 or r2 or r3 or re or we or din)
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always @(rd_adr or r0 or r1 or r2 or r3 or re or we or din)
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if(re & we) dout = din;
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else
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case(rd_adr) // synopsys full_case parallel_case
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case(rd_adr) // synopsys full_case parallel_case
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4'h1: dout = r0;
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4'h1: dout = r0;
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4'h2: dout = r1;
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4'h2: dout = r1;
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4'h4: dout = r2;
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4'h4: dout = r2;
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4'h8: dout = r3;
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4'h8: dout = r3;
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