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//// ////
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//// ////
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//// Downloaded from: http://www.opencores.org/cores/mem_ctrl/ ////
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//// Downloaded from: http://www.opencores.org/cores/mem_ctrl/ ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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//// ////
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//// ////
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//// Copyright (C) 2000 Rudolf Usselmann ////
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//// Copyright (C) 2000-2002 Rudolf Usselmann ////
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//// www.asics.ws ////
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//// rudi@asics.ws ////
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//// rudi@asics.ws ////
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//// ////
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//// ////
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//// This source file may be used and distributed without ////
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//// This source file may be used and distributed without ////
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//// restriction provided that this copyright statement is not ////
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//// restriction provided that this copyright statement is not ////
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//// removed from the file and that any derivative work contains ////
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//// removed from the file and that any derivative work contains ////
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//// ////
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//// ////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// CVS Log
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// CVS Log
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//
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//
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// $Id: mc_refresh.v,v 1.3 2001-12-11 02:47:19 rudi Exp $
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// $Id: mc_refresh.v,v 1.4 2002-01-21 13:08:52 rudi Exp $
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//
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//
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// $Date: 2001-12-11 02:47:19 $
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// $Date: 2002-01-21 13:08:52 $
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// $Revision: 1.3 $
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// $Revision: 1.4 $
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// $Author: rudi $
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// $Author: rudi $
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// $Locker: $
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// $Locker: $
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// $State: Exp $
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// $State: Exp $
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//
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//
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// Change History:
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// Change History:
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// $Log: not supported by cvs2svn $
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// $Log: not supported by cvs2svn $
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// Revision 1.3 2001/12/11 02:47:19 rudi
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//
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// - Made some changes not to expect clock during reset ...
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//
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// Revision 1.2 2001/09/24 00:38:21 rudi
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// Revision 1.2 2001/09/24 00:38:21 rudi
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//
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//
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// Changed Reset to be active high and async.
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// Changed Reset to be active high and async.
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//
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//
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// Revision 1.1 2001/07/29 07:34:41 rudi
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// Revision 1.1 2001/07/29 07:34:41 rudi
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