OpenCores
URL https://opencores.org/ocsvn/mini_aes/mini_aes/trunk

Subversion Repositories mini_aes

[/] [mini_aes/] [trunk/] [source/] [key_scheduler.vhdl] - Diff between revs 12 and 15

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 12 Rev 15
Line 11... Line 11... 
-- Synthesizers: ISE Xilinx 6.3i
 
-- Synthesizers: ISE Xilinx 6.3i
 
-- Target      : 
-- Target      : 
-------------------------------------------------------------------------------
 
-------------------------------------------------------------------------------
 
-- Description : Key Scheduler calculation component
 
-- Description : Key Scheduler calculation component
 
-------------------------------------------------------------------------------
 
-------------------------------------------------------------------------------
 
-- Copyright (C) 2005 Arif E. Nugroho
 
-- Copyright (C) 2005 Arif Endro Nugroho
 
-- This VHDL design file is an open design; you can redistribute it and/or
 
 
 
-- modify it and/or implement it after contacting the author
 
 
 
-------------------------------------------------------------------------------
 
 
 
-------------------------------------------------------------------------------
 
-------------------------------------------------------------------------------
 
-- 
-- 
--         THIS SOURCE FILE MAY BE USED AND DISTRIBUTED WITHOUT RESTRICTION
 
--         THIS SOURCE FILE MAY BE USED AND DISTRIBUTED WITHOUT RESTRICTION
 
-- PROVIDED THAT THIS COPYRIGHT STATEMENT IS NOT REMOVED FROM THE FILE AND THAT
 
-- PROVIDED THAT THIS COPYRIGHT STATEMENT IS NOT REMOVED FROM THE FILE AND THAT
 
-- ANY DERIVATIVE WORK CONTAINS THE ORIGINAL COPYRIGHT NOTICE AND THE
 
-- ANY DERIVATIVE WORK CONTAINS THE ORIGINAL COPYRIGHT NOTICE AND THE

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.