| Line 84... |
Line 84... |
`define TC_TIN_W `TC_DW+1+1
|
`define TC_TIN_W `TC_DW+1+1
|
|
|
//
|
//
|
// Width of WB initiator inputs (coming from WB masters)
|
// Width of WB initiator inputs (coming from WB masters)
|
//
|
//
|
// cyc + stb + cab + address bus width +
|
// cyc + stb + address bus width +
|
// byte select bus width + we + data bus width
|
// byte select bus width + we + data bus width
|
//
|
//
|
`define TC_IIN_W 1+1+1+`TC_AW+`TC_BSW+1+`TC_DW
|
`define TC_IIN_W 1+1+1+`TC_AW+`TC_BSW+1+`TC_DW
|
|
|
//
|
//
|
| Line 98... |
Line 98... |
wb_clk_i,
|
wb_clk_i,
|
wb_rst_i,
|
wb_rst_i,
|
|
|
i0_wb_cyc_i,
|
i0_wb_cyc_i,
|
i0_wb_stb_i,
|
i0_wb_stb_i,
|
i0_wb_cab_i,
|
|
i0_wb_adr_i,
|
i0_wb_adr_i,
|
i0_wb_sel_i,
|
i0_wb_sel_i,
|
i0_wb_we_i,
|
i0_wb_we_i,
|
i0_wb_dat_i,
|
i0_wb_dat_i,
|
i0_wb_dat_o,
|
i0_wb_dat_o,
|
i0_wb_ack_o,
|
i0_wb_ack_o,
|
i0_wb_err_o,
|
i0_wb_err_o,
|
|
|
i1_wb_cyc_i,
|
i1_wb_cyc_i,
|
i1_wb_stb_i,
|
i1_wb_stb_i,
|
i1_wb_cab_i,
|
|
i1_wb_adr_i,
|
i1_wb_adr_i,
|
i1_wb_sel_i,
|
i1_wb_sel_i,
|
i1_wb_we_i,
|
i1_wb_we_i,
|
i1_wb_dat_i,
|
i1_wb_dat_i,
|
i1_wb_dat_o,
|
i1_wb_dat_o,
|
i1_wb_ack_o,
|
i1_wb_ack_o,
|
i1_wb_err_o,
|
i1_wb_err_o,
|
|
|
i2_wb_cyc_i,
|
i2_wb_cyc_i,
|
i2_wb_stb_i,
|
i2_wb_stb_i,
|
i2_wb_cab_i,
|
|
i2_wb_adr_i,
|
i2_wb_adr_i,
|
i2_wb_sel_i,
|
i2_wb_sel_i,
|
i2_wb_we_i,
|
i2_wb_we_i,
|
i2_wb_dat_i,
|
i2_wb_dat_i,
|
i2_wb_dat_o,
|
i2_wb_dat_o,
|
i2_wb_ack_o,
|
i2_wb_ack_o,
|
i2_wb_err_o,
|
i2_wb_err_o,
|
|
|
i3_wb_cyc_i,
|
i3_wb_cyc_i,
|
i3_wb_stb_i,
|
i3_wb_stb_i,
|
i3_wb_cab_i,
|
|
i3_wb_adr_i,
|
i3_wb_adr_i,
|
i3_wb_sel_i,
|
i3_wb_sel_i,
|
i3_wb_we_i,
|
i3_wb_we_i,
|
i3_wb_dat_i,
|
i3_wb_dat_i,
|
i3_wb_dat_o,
|
i3_wb_dat_o,
|
i3_wb_ack_o,
|
i3_wb_ack_o,
|
i3_wb_err_o,
|
i3_wb_err_o,
|
|
|
i4_wb_cyc_i,
|
i4_wb_cyc_i,
|
i4_wb_stb_i,
|
i4_wb_stb_i,
|
i4_wb_cab_i,
|
|
i4_wb_adr_i,
|
i4_wb_adr_i,
|
i4_wb_sel_i,
|
i4_wb_sel_i,
|
i4_wb_we_i,
|
i4_wb_we_i,
|
i4_wb_dat_i,
|
i4_wb_dat_i,
|
i4_wb_dat_o,
|
i4_wb_dat_o,
|
i4_wb_ack_o,
|
i4_wb_ack_o,
|
i4_wb_err_o,
|
i4_wb_err_o,
|
|
|
i5_wb_cyc_i,
|
i5_wb_cyc_i,
|
i5_wb_stb_i,
|
i5_wb_stb_i,
|
i5_wb_cab_i,
|
|
i5_wb_adr_i,
|
i5_wb_adr_i,
|
i5_wb_sel_i,
|
i5_wb_sel_i,
|
i5_wb_we_i,
|
i5_wb_we_i,
|
i5_wb_dat_i,
|
i5_wb_dat_i,
|
i5_wb_dat_o,
|
i5_wb_dat_o,
|
i5_wb_ack_o,
|
i5_wb_ack_o,
|
i5_wb_err_o,
|
i5_wb_err_o,
|
|
|
i6_wb_cyc_i,
|
i6_wb_cyc_i,
|
i6_wb_stb_i,
|
i6_wb_stb_i,
|
i6_wb_cab_i,
|
|
i6_wb_adr_i,
|
i6_wb_adr_i,
|
i6_wb_sel_i,
|
i6_wb_sel_i,
|
i6_wb_we_i,
|
i6_wb_we_i,
|
i6_wb_dat_i,
|
i6_wb_dat_i,
|
i6_wb_dat_o,
|
i6_wb_dat_o,
|
i6_wb_ack_o,
|
i6_wb_ack_o,
|
i6_wb_err_o,
|
i6_wb_err_o,
|
|
|
i7_wb_cyc_i,
|
i7_wb_cyc_i,
|
i7_wb_stb_i,
|
i7_wb_stb_i,
|
i7_wb_cab_i,
|
|
i7_wb_adr_i,
|
i7_wb_adr_i,
|
i7_wb_sel_i,
|
i7_wb_sel_i,
|
i7_wb_we_i,
|
i7_wb_we_i,
|
i7_wb_dat_i,
|
i7_wb_dat_i,
|
i7_wb_dat_o,
|
i7_wb_dat_o,
|
i7_wb_ack_o,
|
i7_wb_ack_o,
|
i7_wb_err_o,
|
i7_wb_err_o,
|
|
|
t0_wb_cyc_o,
|
t0_wb_cyc_o,
|
t0_wb_stb_o,
|
t0_wb_stb_o,
|
t0_wb_cab_o,
|
|
t0_wb_adr_o,
|
t0_wb_adr_o,
|
t0_wb_sel_o,
|
t0_wb_sel_o,
|
t0_wb_we_o,
|
t0_wb_we_o,
|
t0_wb_dat_o,
|
t0_wb_dat_o,
|
t0_wb_dat_i,
|
t0_wb_dat_i,
|
t0_wb_ack_i,
|
t0_wb_ack_i,
|
t0_wb_err_i,
|
t0_wb_err_i,
|
|
|
t1_wb_cyc_o,
|
t1_wb_cyc_o,
|
t1_wb_stb_o,
|
t1_wb_stb_o,
|
t1_wb_cab_o,
|
|
t1_wb_adr_o,
|
t1_wb_adr_o,
|
t1_wb_sel_o,
|
t1_wb_sel_o,
|
t1_wb_we_o,
|
t1_wb_we_o,
|
t1_wb_dat_o,
|
t1_wb_dat_o,
|
t1_wb_dat_i,
|
t1_wb_dat_i,
|
t1_wb_ack_i,
|
t1_wb_ack_i,
|
t1_wb_err_i,
|
t1_wb_err_i,
|
|
|
t2_wb_cyc_o,
|
t2_wb_cyc_o,
|
t2_wb_stb_o,
|
t2_wb_stb_o,
|
t2_wb_cab_o,
|
|
t2_wb_adr_o,
|
t2_wb_adr_o,
|
t2_wb_sel_o,
|
t2_wb_sel_o,
|
t2_wb_we_o,
|
t2_wb_we_o,
|
t2_wb_dat_o,
|
t2_wb_dat_o,
|
t2_wb_dat_i,
|
t2_wb_dat_i,
|
t2_wb_ack_i,
|
t2_wb_ack_i,
|
t2_wb_err_i,
|
t2_wb_err_i,
|
|
|
t3_wb_cyc_o,
|
t3_wb_cyc_o,
|
t3_wb_stb_o,
|
t3_wb_stb_o,
|
t3_wb_cab_o,
|
|
t3_wb_adr_o,
|
t3_wb_adr_o,
|
t3_wb_sel_o,
|
t3_wb_sel_o,
|
t3_wb_we_o,
|
t3_wb_we_o,
|
t3_wb_dat_o,
|
t3_wb_dat_o,
|
t3_wb_dat_i,
|
t3_wb_dat_i,
|
t3_wb_ack_i,
|
t3_wb_ack_i,
|
t3_wb_err_i,
|
t3_wb_err_i,
|
|
|
t4_wb_cyc_o,
|
t4_wb_cyc_o,
|
t4_wb_stb_o,
|
t4_wb_stb_o,
|
t4_wb_cab_o,
|
|
t4_wb_adr_o,
|
t4_wb_adr_o,
|
t4_wb_sel_o,
|
t4_wb_sel_o,
|
t4_wb_we_o,
|
t4_wb_we_o,
|
t4_wb_dat_o,
|
t4_wb_dat_o,
|
t4_wb_dat_i,
|
t4_wb_dat_i,
|
t4_wb_ack_i,
|
t4_wb_ack_i,
|
t4_wb_err_i,
|
t4_wb_err_i,
|
|
|
t5_wb_cyc_o,
|
t5_wb_cyc_o,
|
t5_wb_stb_o,
|
t5_wb_stb_o,
|
t5_wb_cab_o,
|
|
t5_wb_adr_o,
|
t5_wb_adr_o,
|
t5_wb_sel_o,
|
t5_wb_sel_o,
|
t5_wb_we_o,
|
t5_wb_we_o,
|
t5_wb_dat_o,
|
t5_wb_dat_o,
|
t5_wb_dat_i,
|
t5_wb_dat_i,
|
t5_wb_ack_i,
|
t5_wb_ack_i,
|
t5_wb_err_i,
|
t5_wb_err_i,
|
|
|
t6_wb_cyc_o,
|
t6_wb_cyc_o,
|
t6_wb_stb_o,
|
t6_wb_stb_o,
|
t6_wb_cab_o,
|
|
t6_wb_adr_o,
|
t6_wb_adr_o,
|
t6_wb_sel_o,
|
t6_wb_sel_o,
|
t6_wb_we_o,
|
t6_wb_we_o,
|
t6_wb_dat_o,
|
t6_wb_dat_o,
|
t6_wb_dat_i,
|
t6_wb_dat_i,
|
t6_wb_ack_i,
|
t6_wb_ack_i,
|
t6_wb_err_i,
|
t6_wb_err_i,
|
|
|
t7_wb_cyc_o,
|
t7_wb_cyc_o,
|
t7_wb_stb_o,
|
t7_wb_stb_o,
|
t7_wb_cab_o,
|
|
t7_wb_adr_o,
|
t7_wb_adr_o,
|
t7_wb_sel_o,
|
t7_wb_sel_o,
|
t7_wb_we_o,
|
t7_wb_we_o,
|
t7_wb_dat_o,
|
t7_wb_dat_o,
|
t7_wb_dat_i,
|
t7_wb_dat_i,
|
t7_wb_ack_i,
|
t7_wb_ack_i,
|
t7_wb_err_i,
|
t7_wb_err_i,
|
|
|
t8_wb_cyc_o,
|
t8_wb_cyc_o,
|
t8_wb_stb_o,
|
t8_wb_stb_o,
|
t8_wb_cab_o,
|
|
t8_wb_adr_o,
|
t8_wb_adr_o,
|
t8_wb_sel_o,
|
t8_wb_sel_o,
|
t8_wb_we_o,
|
t8_wb_we_o,
|
t8_wb_dat_o,
|
t8_wb_dat_o,
|
t8_wb_dat_i,
|
t8_wb_dat_i,
|
| Line 314... |
Line 297... |
//
|
//
|
// WB slave i/f connecting initiator 0
|
// WB slave i/f connecting initiator 0
|
//
|
//
|
input i0_wb_cyc_i;
|
input i0_wb_cyc_i;
|
input i0_wb_stb_i;
|
input i0_wb_stb_i;
|
input i0_wb_cab_i;
|
|
input [`TC_AW-1:0] i0_wb_adr_i;
|
input [`TC_AW-1:0] i0_wb_adr_i;
|
input [`TC_BSW-1:0] i0_wb_sel_i;
|
input [`TC_BSW-1:0] i0_wb_sel_i;
|
input i0_wb_we_i;
|
input i0_wb_we_i;
|
input [`TC_DW-1:0] i0_wb_dat_i;
|
input [`TC_DW-1:0] i0_wb_dat_i;
|
output [`TC_DW-1:0] i0_wb_dat_o;
|
output [`TC_DW-1:0] i0_wb_dat_o;
|
| Line 328... |
Line 310... |
//
|
//
|
// WB slave i/f connecting initiator 1
|
// WB slave i/f connecting initiator 1
|
//
|
//
|
input i1_wb_cyc_i;
|
input i1_wb_cyc_i;
|
input i1_wb_stb_i;
|
input i1_wb_stb_i;
|
input i1_wb_cab_i;
|
|
input [`TC_AW-1:0] i1_wb_adr_i;
|
input [`TC_AW-1:0] i1_wb_adr_i;
|
input [`TC_BSW-1:0] i1_wb_sel_i;
|
input [`TC_BSW-1:0] i1_wb_sel_i;
|
input i1_wb_we_i;
|
input i1_wb_we_i;
|
input [`TC_DW-1:0] i1_wb_dat_i;
|
input [`TC_DW-1:0] i1_wb_dat_i;
|
output [`TC_DW-1:0] i1_wb_dat_o;
|
output [`TC_DW-1:0] i1_wb_dat_o;
|
| Line 342... |
Line 323... |
//
|
//
|
// WB slave i/f connecting initiator 2
|
// WB slave i/f connecting initiator 2
|
//
|
//
|
input i2_wb_cyc_i;
|
input i2_wb_cyc_i;
|
input i2_wb_stb_i;
|
input i2_wb_stb_i;
|
input i2_wb_cab_i;
|
|
input [`TC_AW-1:0] i2_wb_adr_i;
|
input [`TC_AW-1:0] i2_wb_adr_i;
|
input [`TC_BSW-1:0] i2_wb_sel_i;
|
input [`TC_BSW-1:0] i2_wb_sel_i;
|
input i2_wb_we_i;
|
input i2_wb_we_i;
|
input [`TC_DW-1:0] i2_wb_dat_i;
|
input [`TC_DW-1:0] i2_wb_dat_i;
|
output [`TC_DW-1:0] i2_wb_dat_o;
|
output [`TC_DW-1:0] i2_wb_dat_o;
|
| Line 356... |
Line 336... |
//
|
//
|
// WB slave i/f connecting initiator 3
|
// WB slave i/f connecting initiator 3
|
//
|
//
|
input i3_wb_cyc_i;
|
input i3_wb_cyc_i;
|
input i3_wb_stb_i;
|
input i3_wb_stb_i;
|
input i3_wb_cab_i;
|
|
input [`TC_AW-1:0] i3_wb_adr_i;
|
input [`TC_AW-1:0] i3_wb_adr_i;
|
input [`TC_BSW-1:0] i3_wb_sel_i;
|
input [`TC_BSW-1:0] i3_wb_sel_i;
|
input i3_wb_we_i;
|
input i3_wb_we_i;
|
input [`TC_DW-1:0] i3_wb_dat_i;
|
input [`TC_DW-1:0] i3_wb_dat_i;
|
output [`TC_DW-1:0] i3_wb_dat_o;
|
output [`TC_DW-1:0] i3_wb_dat_o;
|
| Line 370... |
Line 349... |
//
|
//
|
// WB slave i/f connecting initiator 4
|
// WB slave i/f connecting initiator 4
|
//
|
//
|
input i4_wb_cyc_i;
|
input i4_wb_cyc_i;
|
input i4_wb_stb_i;
|
input i4_wb_stb_i;
|
input i4_wb_cab_i;
|
|
input [`TC_AW-1:0] i4_wb_adr_i;
|
input [`TC_AW-1:0] i4_wb_adr_i;
|
input [`TC_BSW-1:0] i4_wb_sel_i;
|
input [`TC_BSW-1:0] i4_wb_sel_i;
|
input i4_wb_we_i;
|
input i4_wb_we_i;
|
input [`TC_DW-1:0] i4_wb_dat_i;
|
input [`TC_DW-1:0] i4_wb_dat_i;
|
output [`TC_DW-1:0] i4_wb_dat_o;
|
output [`TC_DW-1:0] i4_wb_dat_o;
|
| Line 384... |
Line 362... |
//
|
//
|
// WB slave i/f connecting initiator 5
|
// WB slave i/f connecting initiator 5
|
//
|
//
|
input i5_wb_cyc_i;
|
input i5_wb_cyc_i;
|
input i5_wb_stb_i;
|
input i5_wb_stb_i;
|
input i5_wb_cab_i;
|
|
input [`TC_AW-1:0] i5_wb_adr_i;
|
input [`TC_AW-1:0] i5_wb_adr_i;
|
input [`TC_BSW-1:0] i5_wb_sel_i;
|
input [`TC_BSW-1:0] i5_wb_sel_i;
|
input i5_wb_we_i;
|
input i5_wb_we_i;
|
input [`TC_DW-1:0] i5_wb_dat_i;
|
input [`TC_DW-1:0] i5_wb_dat_i;
|
output [`TC_DW-1:0] i5_wb_dat_o;
|
output [`TC_DW-1:0] i5_wb_dat_o;
|
| Line 398... |
Line 375... |
//
|
//
|
// WB slave i/f connecting initiator 6
|
// WB slave i/f connecting initiator 6
|
//
|
//
|
input i6_wb_cyc_i;
|
input i6_wb_cyc_i;
|
input i6_wb_stb_i;
|
input i6_wb_stb_i;
|
input i6_wb_cab_i;
|
|
input [`TC_AW-1:0] i6_wb_adr_i;
|
input [`TC_AW-1:0] i6_wb_adr_i;
|
input [`TC_BSW-1:0] i6_wb_sel_i;
|
input [`TC_BSW-1:0] i6_wb_sel_i;
|
input i6_wb_we_i;
|
input i6_wb_we_i;
|
input [`TC_DW-1:0] i6_wb_dat_i;
|
input [`TC_DW-1:0] i6_wb_dat_i;
|
output [`TC_DW-1:0] i6_wb_dat_o;
|
output [`TC_DW-1:0] i6_wb_dat_o;
|
| Line 412... |
Line 388... |
//
|
//
|
// WB slave i/f connecting initiator 7
|
// WB slave i/f connecting initiator 7
|
//
|
//
|
input i7_wb_cyc_i;
|
input i7_wb_cyc_i;
|
input i7_wb_stb_i;
|
input i7_wb_stb_i;
|
input i7_wb_cab_i;
|
|
input [`TC_AW-1:0] i7_wb_adr_i;
|
input [`TC_AW-1:0] i7_wb_adr_i;
|
input [`TC_BSW-1:0] i7_wb_sel_i;
|
input [`TC_BSW-1:0] i7_wb_sel_i;
|
input i7_wb_we_i;
|
input i7_wb_we_i;
|
input [`TC_DW-1:0] i7_wb_dat_i;
|
input [`TC_DW-1:0] i7_wb_dat_i;
|
output [`TC_DW-1:0] i7_wb_dat_o;
|
output [`TC_DW-1:0] i7_wb_dat_o;
|
| Line 426... |
Line 401... |
//
|
//
|
// WB master i/f connecting target 0
|
// WB master i/f connecting target 0
|
//
|
//
|
output t0_wb_cyc_o;
|
output t0_wb_cyc_o;
|
output t0_wb_stb_o;
|
output t0_wb_stb_o;
|
output t0_wb_cab_o;
|
|
output [`TC_AW-1:0] t0_wb_adr_o;
|
output [`TC_AW-1:0] t0_wb_adr_o;
|
output [`TC_BSW-1:0] t0_wb_sel_o;
|
output [`TC_BSW-1:0] t0_wb_sel_o;
|
output t0_wb_we_o;
|
output t0_wb_we_o;
|
output [`TC_DW-1:0] t0_wb_dat_o;
|
output [`TC_DW-1:0] t0_wb_dat_o;
|
input [`TC_DW-1:0] t0_wb_dat_i;
|
input [`TC_DW-1:0] t0_wb_dat_i;
|
| Line 440... |
Line 414... |
//
|
//
|
// WB master i/f connecting target 1
|
// WB master i/f connecting target 1
|
//
|
//
|
output t1_wb_cyc_o;
|
output t1_wb_cyc_o;
|
output t1_wb_stb_o;
|
output t1_wb_stb_o;
|
output t1_wb_cab_o;
|
|
output [`TC_AW-1:0] t1_wb_adr_o;
|
output [`TC_AW-1:0] t1_wb_adr_o;
|
output [`TC_BSW-1:0] t1_wb_sel_o;
|
output [`TC_BSW-1:0] t1_wb_sel_o;
|
output t1_wb_we_o;
|
output t1_wb_we_o;
|
output [`TC_DW-1:0] t1_wb_dat_o;
|
output [`TC_DW-1:0] t1_wb_dat_o;
|
input [`TC_DW-1:0] t1_wb_dat_i;
|
input [`TC_DW-1:0] t1_wb_dat_i;
|
| Line 454... |
Line 427... |
//
|
//
|
// WB master i/f connecting target 2
|
// WB master i/f connecting target 2
|
//
|
//
|
output t2_wb_cyc_o;
|
output t2_wb_cyc_o;
|
output t2_wb_stb_o;
|
output t2_wb_stb_o;
|
output t2_wb_cab_o;
|
|
output [`TC_AW-1:0] t2_wb_adr_o;
|
output [`TC_AW-1:0] t2_wb_adr_o;
|
output [`TC_BSW-1:0] t2_wb_sel_o;
|
output [`TC_BSW-1:0] t2_wb_sel_o;
|
output t2_wb_we_o;
|
output t2_wb_we_o;
|
output [`TC_DW-1:0] t2_wb_dat_o;
|
output [`TC_DW-1:0] t2_wb_dat_o;
|
input [`TC_DW-1:0] t2_wb_dat_i;
|
input [`TC_DW-1:0] t2_wb_dat_i;
|
| Line 468... |
Line 440... |
//
|
//
|
// WB master i/f connecting target 3
|
// WB master i/f connecting target 3
|
//
|
//
|
output t3_wb_cyc_o;
|
output t3_wb_cyc_o;
|
output t3_wb_stb_o;
|
output t3_wb_stb_o;
|
output t3_wb_cab_o;
|
|
output [`TC_AW-1:0] t3_wb_adr_o;
|
output [`TC_AW-1:0] t3_wb_adr_o;
|
output [`TC_BSW-1:0] t3_wb_sel_o;
|
output [`TC_BSW-1:0] t3_wb_sel_o;
|
output t3_wb_we_o;
|
output t3_wb_we_o;
|
output [`TC_DW-1:0] t3_wb_dat_o;
|
output [`TC_DW-1:0] t3_wb_dat_o;
|
input [`TC_DW-1:0] t3_wb_dat_i;
|
input [`TC_DW-1:0] t3_wb_dat_i;
|
| Line 482... |
Line 453... |
//
|
//
|
// WB master i/f connecting target 4
|
// WB master i/f connecting target 4
|
//
|
//
|
output t4_wb_cyc_o;
|
output t4_wb_cyc_o;
|
output t4_wb_stb_o;
|
output t4_wb_stb_o;
|
output t4_wb_cab_o;
|
|
output [`TC_AW-1:0] t4_wb_adr_o;
|
output [`TC_AW-1:0] t4_wb_adr_o;
|
output [`TC_BSW-1:0] t4_wb_sel_o;
|
output [`TC_BSW-1:0] t4_wb_sel_o;
|
output t4_wb_we_o;
|
output t4_wb_we_o;
|
output [`TC_DW-1:0] t4_wb_dat_o;
|
output [`TC_DW-1:0] t4_wb_dat_o;
|
input [`TC_DW-1:0] t4_wb_dat_i;
|
input [`TC_DW-1:0] t4_wb_dat_i;
|
| Line 496... |
Line 466... |
//
|
//
|
// WB master i/f connecting target 5
|
// WB master i/f connecting target 5
|
//
|
//
|
output t5_wb_cyc_o;
|
output t5_wb_cyc_o;
|
output t5_wb_stb_o;
|
output t5_wb_stb_o;
|
output t5_wb_cab_o;
|
|
output [`TC_AW-1:0] t5_wb_adr_o;
|
output [`TC_AW-1:0] t5_wb_adr_o;
|
output [`TC_BSW-1:0] t5_wb_sel_o;
|
output [`TC_BSW-1:0] t5_wb_sel_o;
|
output t5_wb_we_o;
|
output t5_wb_we_o;
|
output [`TC_DW-1:0] t5_wb_dat_o;
|
output [`TC_DW-1:0] t5_wb_dat_o;
|
input [`TC_DW-1:0] t5_wb_dat_i;
|
input [`TC_DW-1:0] t5_wb_dat_i;
|
| Line 510... |
Line 479... |
//
|
//
|
// WB master i/f connecting target 6
|
// WB master i/f connecting target 6
|
//
|
//
|
output t6_wb_cyc_o;
|
output t6_wb_cyc_o;
|
output t6_wb_stb_o;
|
output t6_wb_stb_o;
|
output t6_wb_cab_o;
|
|
output [`TC_AW-1:0] t6_wb_adr_o;
|
output [`TC_AW-1:0] t6_wb_adr_o;
|
output [`TC_BSW-1:0] t6_wb_sel_o;
|
output [`TC_BSW-1:0] t6_wb_sel_o;
|
output t6_wb_we_o;
|
output t6_wb_we_o;
|
output [`TC_DW-1:0] t6_wb_dat_o;
|
output [`TC_DW-1:0] t6_wb_dat_o;
|
input [`TC_DW-1:0] t6_wb_dat_i;
|
input [`TC_DW-1:0] t6_wb_dat_i;
|
| Line 524... |
Line 492... |
//
|
//
|
// WB master i/f connecting target 7
|
// WB master i/f connecting target 7
|
//
|
//
|
output t7_wb_cyc_o;
|
output t7_wb_cyc_o;
|
output t7_wb_stb_o;
|
output t7_wb_stb_o;
|
output t7_wb_cab_o;
|
|
output [`TC_AW-1:0] t7_wb_adr_o;
|
output [`TC_AW-1:0] t7_wb_adr_o;
|
output [`TC_BSW-1:0] t7_wb_sel_o;
|
output [`TC_BSW-1:0] t7_wb_sel_o;
|
output t7_wb_we_o;
|
output t7_wb_we_o;
|
output [`TC_DW-1:0] t7_wb_dat_o;
|
output [`TC_DW-1:0] t7_wb_dat_o;
|
input [`TC_DW-1:0] t7_wb_dat_i;
|
input [`TC_DW-1:0] t7_wb_dat_i;
|
| Line 538... |
Line 505... |
//
|
//
|
// WB master i/f connecting target 8
|
// WB master i/f connecting target 8
|
//
|
//
|
output t8_wb_cyc_o;
|
output t8_wb_cyc_o;
|
output t8_wb_stb_o;
|
output t8_wb_stb_o;
|
output t8_wb_cab_o;
|
|
output [`TC_AW-1:0] t8_wb_adr_o;
|
output [`TC_AW-1:0] t8_wb_adr_o;
|
output [`TC_BSW-1:0] t8_wb_sel_o;
|
output [`TC_BSW-1:0] t8_wb_sel_o;
|
output t8_wb_we_o;
|
output t8_wb_we_o;
|
output [`TC_DW-1:0] t8_wb_dat_o;
|
output [`TC_DW-1:0] t8_wb_dat_o;
|
input [`TC_DW-1:0] t8_wb_dat_i;
|
input [`TC_DW-1:0] t8_wb_dat_i;
|
| Line 609... |
Line 575... |
// Intermediate signals connecting peripheral channel's
|
// Intermediate signals connecting peripheral channel's
|
// mi_to_st and si_to_mt blocks.
|
// mi_to_st and si_to_mt blocks.
|
//
|
//
|
wire z_wb_cyc_i;
|
wire z_wb_cyc_i;
|
wire z_wb_stb_i;
|
wire z_wb_stb_i;
|
wire z_wb_cab_i;
|
|
wire [`TC_AW-1:0] z_wb_adr_i;
|
wire [`TC_AW-1:0] z_wb_adr_i;
|
wire [`TC_BSW-1:0] z_wb_sel_i;
|
wire [`TC_BSW-1:0] z_wb_sel_i;
|
wire z_wb_we_i;
|
wire z_wb_we_i;
|
wire [`TC_DW-1:0] z_wb_dat_i;
|
wire [`TC_DW-1:0] z_wb_dat_i;
|
wire [`TC_DW-1:0] z_wb_dat_t;
|
wire [`TC_DW-1:0] z_wb_dat_t;
|
| Line 656... |
Line 621... |
.wb_clk_i(wb_clk_i),
|
.wb_clk_i(wb_clk_i),
|
.wb_rst_i(wb_rst_i),
|
.wb_rst_i(wb_rst_i),
|
|
|
.i0_wb_cyc_i(i0_wb_cyc_i),
|
.i0_wb_cyc_i(i0_wb_cyc_i),
|
.i0_wb_stb_i(i0_wb_stb_i),
|
.i0_wb_stb_i(i0_wb_stb_i),
|
.i0_wb_cab_i(i0_wb_cab_i),
|
|
.i0_wb_adr_i(i0_wb_adr_i),
|
.i0_wb_adr_i(i0_wb_adr_i),
|
.i0_wb_sel_i(i0_wb_sel_i),
|
.i0_wb_sel_i(i0_wb_sel_i),
|
.i0_wb_we_i(i0_wb_we_i),
|
.i0_wb_we_i(i0_wb_we_i),
|
.i0_wb_dat_i(i0_wb_dat_i),
|
.i0_wb_dat_i(i0_wb_dat_i),
|
.i0_wb_dat_o(xi0_wb_dat_o),
|
.i0_wb_dat_o(xi0_wb_dat_o),
|
.i0_wb_ack_o(xi0_wb_ack_o),
|
.i0_wb_ack_o(xi0_wb_ack_o),
|
.i0_wb_err_o(xi0_wb_err_o),
|
.i0_wb_err_o(xi0_wb_err_o),
|
|
|
.i1_wb_cyc_i(i1_wb_cyc_i),
|
.i1_wb_cyc_i(i1_wb_cyc_i),
|
.i1_wb_stb_i(i1_wb_stb_i),
|
.i1_wb_stb_i(i1_wb_stb_i),
|
.i1_wb_cab_i(i1_wb_cab_i),
|
|
.i1_wb_adr_i(i1_wb_adr_i),
|
.i1_wb_adr_i(i1_wb_adr_i),
|
.i1_wb_sel_i(i1_wb_sel_i),
|
.i1_wb_sel_i(i1_wb_sel_i),
|
.i1_wb_we_i(i1_wb_we_i),
|
.i1_wb_we_i(i1_wb_we_i),
|
.i1_wb_dat_i(i1_wb_dat_i),
|
.i1_wb_dat_i(i1_wb_dat_i),
|
.i1_wb_dat_o(xi1_wb_dat_o),
|
.i1_wb_dat_o(xi1_wb_dat_o),
|
.i1_wb_ack_o(xi1_wb_ack_o),
|
.i1_wb_ack_o(xi1_wb_ack_o),
|
.i1_wb_err_o(xi1_wb_err_o),
|
.i1_wb_err_o(xi1_wb_err_o),
|
|
|
.i2_wb_cyc_i(i2_wb_cyc_i),
|
.i2_wb_cyc_i(i2_wb_cyc_i),
|
.i2_wb_stb_i(i2_wb_stb_i),
|
.i2_wb_stb_i(i2_wb_stb_i),
|
.i2_wb_cab_i(i2_wb_cab_i),
|
|
.i2_wb_adr_i(i2_wb_adr_i),
|
.i2_wb_adr_i(i2_wb_adr_i),
|
.i2_wb_sel_i(i2_wb_sel_i),
|
.i2_wb_sel_i(i2_wb_sel_i),
|
.i2_wb_we_i(i2_wb_we_i),
|
.i2_wb_we_i(i2_wb_we_i),
|
.i2_wb_dat_i(i2_wb_dat_i),
|
.i2_wb_dat_i(i2_wb_dat_i),
|
.i2_wb_dat_o(xi2_wb_dat_o),
|
.i2_wb_dat_o(xi2_wb_dat_o),
|
.i2_wb_ack_o(xi2_wb_ack_o),
|
.i2_wb_ack_o(xi2_wb_ack_o),
|
.i2_wb_err_o(xi2_wb_err_o),
|
.i2_wb_err_o(xi2_wb_err_o),
|
|
|
.i3_wb_cyc_i(i3_wb_cyc_i),
|
.i3_wb_cyc_i(i3_wb_cyc_i),
|
.i3_wb_stb_i(i3_wb_stb_i),
|
.i3_wb_stb_i(i3_wb_stb_i),
|
.i3_wb_cab_i(i3_wb_cab_i),
|
|
.i3_wb_adr_i(i3_wb_adr_i),
|
.i3_wb_adr_i(i3_wb_adr_i),
|
.i3_wb_sel_i(i3_wb_sel_i),
|
.i3_wb_sel_i(i3_wb_sel_i),
|
.i3_wb_we_i(i3_wb_we_i),
|
.i3_wb_we_i(i3_wb_we_i),
|
.i3_wb_dat_i(i3_wb_dat_i),
|
.i3_wb_dat_i(i3_wb_dat_i),
|
.i3_wb_dat_o(xi3_wb_dat_o),
|
.i3_wb_dat_o(xi3_wb_dat_o),
|
.i3_wb_ack_o(xi3_wb_ack_o),
|
.i3_wb_ack_o(xi3_wb_ack_o),
|
.i3_wb_err_o(xi3_wb_err_o),
|
.i3_wb_err_o(xi3_wb_err_o),
|
|
|
.i4_wb_cyc_i(i4_wb_cyc_i),
|
.i4_wb_cyc_i(i4_wb_cyc_i),
|
.i4_wb_stb_i(i4_wb_stb_i),
|
.i4_wb_stb_i(i4_wb_stb_i),
|
.i4_wb_cab_i(i4_wb_cab_i),
|
|
.i4_wb_adr_i(i4_wb_adr_i),
|
.i4_wb_adr_i(i4_wb_adr_i),
|
.i4_wb_sel_i(i4_wb_sel_i),
|
.i4_wb_sel_i(i4_wb_sel_i),
|
.i4_wb_we_i(i4_wb_we_i),
|
.i4_wb_we_i(i4_wb_we_i),
|
.i4_wb_dat_i(i4_wb_dat_i),
|
.i4_wb_dat_i(i4_wb_dat_i),
|
.i4_wb_dat_o(xi4_wb_dat_o),
|
.i4_wb_dat_o(xi4_wb_dat_o),
|
.i4_wb_ack_o(xi4_wb_ack_o),
|
.i4_wb_ack_o(xi4_wb_ack_o),
|
.i4_wb_err_o(xi4_wb_err_o),
|
.i4_wb_err_o(xi4_wb_err_o),
|
|
|
.i5_wb_cyc_i(i5_wb_cyc_i),
|
.i5_wb_cyc_i(i5_wb_cyc_i),
|
.i5_wb_stb_i(i5_wb_stb_i),
|
.i5_wb_stb_i(i5_wb_stb_i),
|
.i5_wb_cab_i(i5_wb_cab_i),
|
|
.i5_wb_adr_i(i5_wb_adr_i),
|
.i5_wb_adr_i(i5_wb_adr_i),
|
.i5_wb_sel_i(i5_wb_sel_i),
|
.i5_wb_sel_i(i5_wb_sel_i),
|
.i5_wb_we_i(i5_wb_we_i),
|
.i5_wb_we_i(i5_wb_we_i),
|
.i5_wb_dat_i(i5_wb_dat_i),
|
.i5_wb_dat_i(i5_wb_dat_i),
|
.i5_wb_dat_o(xi5_wb_dat_o),
|
.i5_wb_dat_o(xi5_wb_dat_o),
|
.i5_wb_ack_o(xi5_wb_ack_o),
|
.i5_wb_ack_o(xi5_wb_ack_o),
|
.i5_wb_err_o(xi5_wb_err_o),
|
.i5_wb_err_o(xi5_wb_err_o),
|
|
|
.i6_wb_cyc_i(i6_wb_cyc_i),
|
.i6_wb_cyc_i(i6_wb_cyc_i),
|
.i6_wb_stb_i(i6_wb_stb_i),
|
.i6_wb_stb_i(i6_wb_stb_i),
|
.i6_wb_cab_i(i6_wb_cab_i),
|
|
.i6_wb_adr_i(i6_wb_adr_i),
|
.i6_wb_adr_i(i6_wb_adr_i),
|
.i6_wb_sel_i(i6_wb_sel_i),
|
.i6_wb_sel_i(i6_wb_sel_i),
|
.i6_wb_we_i(i6_wb_we_i),
|
.i6_wb_we_i(i6_wb_we_i),
|
.i6_wb_dat_i(i6_wb_dat_i),
|
.i6_wb_dat_i(i6_wb_dat_i),
|
.i6_wb_dat_o(xi6_wb_dat_o),
|
.i6_wb_dat_o(xi6_wb_dat_o),
|
.i6_wb_ack_o(xi6_wb_ack_o),
|
.i6_wb_ack_o(xi6_wb_ack_o),
|
.i6_wb_err_o(xi6_wb_err_o),
|
.i6_wb_err_o(xi6_wb_err_o),
|
|
|
.i7_wb_cyc_i(i7_wb_cyc_i),
|
.i7_wb_cyc_i(i7_wb_cyc_i),
|
.i7_wb_stb_i(i7_wb_stb_i),
|
.i7_wb_stb_i(i7_wb_stb_i),
|
.i7_wb_cab_i(i7_wb_cab_i),
|
|
.i7_wb_adr_i(i7_wb_adr_i),
|
.i7_wb_adr_i(i7_wb_adr_i),
|
.i7_wb_sel_i(i7_wb_sel_i),
|
.i7_wb_sel_i(i7_wb_sel_i),
|
.i7_wb_we_i(i7_wb_we_i),
|
.i7_wb_we_i(i7_wb_we_i),
|
.i7_wb_dat_i(i7_wb_dat_i),
|
.i7_wb_dat_i(i7_wb_dat_i),
|
.i7_wb_dat_o(xi7_wb_dat_o),
|
.i7_wb_dat_o(xi7_wb_dat_o),
|
.i7_wb_ack_o(xi7_wb_ack_o),
|
.i7_wb_ack_o(xi7_wb_ack_o),
|
.i7_wb_err_o(xi7_wb_err_o),
|
.i7_wb_err_o(xi7_wb_err_o),
|
|
|
.t0_wb_cyc_o(t0_wb_cyc_o),
|
.t0_wb_cyc_o(t0_wb_cyc_o),
|
.t0_wb_stb_o(t0_wb_stb_o),
|
.t0_wb_stb_o(t0_wb_stb_o),
|
.t0_wb_cab_o(t0_wb_cab_o),
|
|
.t0_wb_adr_o(t0_wb_adr_o),
|
.t0_wb_adr_o(t0_wb_adr_o),
|
.t0_wb_sel_o(t0_wb_sel_o),
|
.t0_wb_sel_o(t0_wb_sel_o),
|
.t0_wb_we_o(t0_wb_we_o),
|
.t0_wb_we_o(t0_wb_we_o),
|
.t0_wb_dat_o(t0_wb_dat_o),
|
.t0_wb_dat_o(t0_wb_dat_o),
|
.t0_wb_dat_i(t0_wb_dat_i),
|
.t0_wb_dat_i(t0_wb_dat_i),
|
| Line 765... |
Line 721... |
.wb_clk_i(wb_clk_i),
|
.wb_clk_i(wb_clk_i),
|
.wb_rst_i(wb_rst_i),
|
.wb_rst_i(wb_rst_i),
|
|
|
.i0_wb_cyc_i(i0_wb_cyc_i),
|
.i0_wb_cyc_i(i0_wb_cyc_i),
|
.i0_wb_stb_i(i0_wb_stb_i),
|
.i0_wb_stb_i(i0_wb_stb_i),
|
.i0_wb_cab_i(i0_wb_cab_i),
|
|
.i0_wb_adr_i(i0_wb_adr_i),
|
.i0_wb_adr_i(i0_wb_adr_i),
|
.i0_wb_sel_i(i0_wb_sel_i),
|
.i0_wb_sel_i(i0_wb_sel_i),
|
.i0_wb_we_i(i0_wb_we_i),
|
.i0_wb_we_i(i0_wb_we_i),
|
.i0_wb_dat_i(i0_wb_dat_i),
|
.i0_wb_dat_i(i0_wb_dat_i),
|
.i0_wb_dat_o(yi0_wb_dat_o),
|
.i0_wb_dat_o(yi0_wb_dat_o),
|
.i0_wb_ack_o(yi0_wb_ack_o),
|
.i0_wb_ack_o(yi0_wb_ack_o),
|
.i0_wb_err_o(yi0_wb_err_o),
|
.i0_wb_err_o(yi0_wb_err_o),
|
|
|
.i1_wb_cyc_i(i1_wb_cyc_i),
|
.i1_wb_cyc_i(i1_wb_cyc_i),
|
.i1_wb_stb_i(i1_wb_stb_i),
|
.i1_wb_stb_i(i1_wb_stb_i),
|
.i1_wb_cab_i(i1_wb_cab_i),
|
|
.i1_wb_adr_i(i1_wb_adr_i),
|
.i1_wb_adr_i(i1_wb_adr_i),
|
.i1_wb_sel_i(i1_wb_sel_i),
|
.i1_wb_sel_i(i1_wb_sel_i),
|
.i1_wb_we_i(i1_wb_we_i),
|
.i1_wb_we_i(i1_wb_we_i),
|
.i1_wb_dat_i(i1_wb_dat_i),
|
.i1_wb_dat_i(i1_wb_dat_i),
|
.i1_wb_dat_o(yi1_wb_dat_o),
|
.i1_wb_dat_o(yi1_wb_dat_o),
|
.i1_wb_ack_o(yi1_wb_ack_o),
|
.i1_wb_ack_o(yi1_wb_ack_o),
|
.i1_wb_err_o(yi1_wb_err_o),
|
.i1_wb_err_o(yi1_wb_err_o),
|
|
|
.i2_wb_cyc_i(i2_wb_cyc_i),
|
.i2_wb_cyc_i(i2_wb_cyc_i),
|
.i2_wb_stb_i(i2_wb_stb_i),
|
.i2_wb_stb_i(i2_wb_stb_i),
|
.i2_wb_cab_i(i2_wb_cab_i),
|
|
.i2_wb_adr_i(i2_wb_adr_i),
|
.i2_wb_adr_i(i2_wb_adr_i),
|
.i2_wb_sel_i(i2_wb_sel_i),
|
.i2_wb_sel_i(i2_wb_sel_i),
|
.i2_wb_we_i(i2_wb_we_i),
|
.i2_wb_we_i(i2_wb_we_i),
|
.i2_wb_dat_i(i2_wb_dat_i),
|
.i2_wb_dat_i(i2_wb_dat_i),
|
.i2_wb_dat_o(yi2_wb_dat_o),
|
.i2_wb_dat_o(yi2_wb_dat_o),
|
.i2_wb_ack_o(yi2_wb_ack_o),
|
.i2_wb_ack_o(yi2_wb_ack_o),
|
.i2_wb_err_o(yi2_wb_err_o),
|
.i2_wb_err_o(yi2_wb_err_o),
|
|
|
.i3_wb_cyc_i(i3_wb_cyc_i),
|
.i3_wb_cyc_i(i3_wb_cyc_i),
|
.i3_wb_stb_i(i3_wb_stb_i),
|
.i3_wb_stb_i(i3_wb_stb_i),
|
.i3_wb_cab_i(i3_wb_cab_i),
|
|
.i3_wb_adr_i(i3_wb_adr_i),
|
.i3_wb_adr_i(i3_wb_adr_i),
|
.i3_wb_sel_i(i3_wb_sel_i),
|
.i3_wb_sel_i(i3_wb_sel_i),
|
.i3_wb_we_i(i3_wb_we_i),
|
.i3_wb_we_i(i3_wb_we_i),
|
.i3_wb_dat_i(i3_wb_dat_i),
|
.i3_wb_dat_i(i3_wb_dat_i),
|
.i3_wb_dat_o(yi3_wb_dat_o),
|
.i3_wb_dat_o(yi3_wb_dat_o),
|
.i3_wb_ack_o(yi3_wb_ack_o),
|
.i3_wb_ack_o(yi3_wb_ack_o),
|
.i3_wb_err_o(yi3_wb_err_o),
|
.i3_wb_err_o(yi3_wb_err_o),
|
|
|
.i4_wb_cyc_i(i4_wb_cyc_i),
|
.i4_wb_cyc_i(i4_wb_cyc_i),
|
.i4_wb_stb_i(i4_wb_stb_i),
|
.i4_wb_stb_i(i4_wb_stb_i),
|
.i4_wb_cab_i(i4_wb_cab_i),
|
|
.i4_wb_adr_i(i4_wb_adr_i),
|
.i4_wb_adr_i(i4_wb_adr_i),
|
.i4_wb_sel_i(i4_wb_sel_i),
|
.i4_wb_sel_i(i4_wb_sel_i),
|
.i4_wb_we_i(i4_wb_we_i),
|
.i4_wb_we_i(i4_wb_we_i),
|
.i4_wb_dat_i(i4_wb_dat_i),
|
.i4_wb_dat_i(i4_wb_dat_i),
|
.i4_wb_dat_o(yi4_wb_dat_o),
|
.i4_wb_dat_o(yi4_wb_dat_o),
|
.i4_wb_ack_o(yi4_wb_ack_o),
|
.i4_wb_ack_o(yi4_wb_ack_o),
|
.i4_wb_err_o(yi4_wb_err_o),
|
.i4_wb_err_o(yi4_wb_err_o),
|
|
|
.i5_wb_cyc_i(i5_wb_cyc_i),
|
.i5_wb_cyc_i(i5_wb_cyc_i),
|
.i5_wb_stb_i(i5_wb_stb_i),
|
.i5_wb_stb_i(i5_wb_stb_i),
|
.i5_wb_cab_i(i5_wb_cab_i),
|
|
.i5_wb_adr_i(i5_wb_adr_i),
|
.i5_wb_adr_i(i5_wb_adr_i),
|
.i5_wb_sel_i(i5_wb_sel_i),
|
.i5_wb_sel_i(i5_wb_sel_i),
|
.i5_wb_we_i(i5_wb_we_i),
|
.i5_wb_we_i(i5_wb_we_i),
|
.i5_wb_dat_i(i5_wb_dat_i),
|
.i5_wb_dat_i(i5_wb_dat_i),
|
.i5_wb_dat_o(yi5_wb_dat_o),
|
.i5_wb_dat_o(yi5_wb_dat_o),
|
.i5_wb_ack_o(yi5_wb_ack_o),
|
.i5_wb_ack_o(yi5_wb_ack_o),
|
.i5_wb_err_o(yi5_wb_err_o),
|
.i5_wb_err_o(yi5_wb_err_o),
|
|
|
.i6_wb_cyc_i(i6_wb_cyc_i),
|
.i6_wb_cyc_i(i6_wb_cyc_i),
|
.i6_wb_stb_i(i6_wb_stb_i),
|
.i6_wb_stb_i(i6_wb_stb_i),
|
.i6_wb_cab_i(i6_wb_cab_i),
|
|
.i6_wb_adr_i(i6_wb_adr_i),
|
.i6_wb_adr_i(i6_wb_adr_i),
|
.i6_wb_sel_i(i6_wb_sel_i),
|
.i6_wb_sel_i(i6_wb_sel_i),
|
.i6_wb_we_i(i6_wb_we_i),
|
.i6_wb_we_i(i6_wb_we_i),
|
.i6_wb_dat_i(i6_wb_dat_i),
|
.i6_wb_dat_i(i6_wb_dat_i),
|
.i6_wb_dat_o(yi6_wb_dat_o),
|
.i6_wb_dat_o(yi6_wb_dat_o),
|
.i6_wb_ack_o(yi6_wb_ack_o),
|
.i6_wb_ack_o(yi6_wb_ack_o),
|
.i6_wb_err_o(yi6_wb_err_o),
|
.i6_wb_err_o(yi6_wb_err_o),
|
|
|
.i7_wb_cyc_i(i7_wb_cyc_i),
|
.i7_wb_cyc_i(i7_wb_cyc_i),
|
.i7_wb_stb_i(i7_wb_stb_i),
|
.i7_wb_stb_i(i7_wb_stb_i),
|
.i7_wb_cab_i(i7_wb_cab_i),
|
|
.i7_wb_adr_i(i7_wb_adr_i),
|
.i7_wb_adr_i(i7_wb_adr_i),
|
.i7_wb_sel_i(i7_wb_sel_i),
|
.i7_wb_sel_i(i7_wb_sel_i),
|
.i7_wb_we_i(i7_wb_we_i),
|
.i7_wb_we_i(i7_wb_we_i),
|
.i7_wb_dat_i(i7_wb_dat_i),
|
.i7_wb_dat_i(i7_wb_dat_i),
|
.i7_wb_dat_o(yi7_wb_dat_o),
|
.i7_wb_dat_o(yi7_wb_dat_o),
|
.i7_wb_ack_o(yi7_wb_ack_o),
|
.i7_wb_ack_o(yi7_wb_ack_o),
|
.i7_wb_err_o(yi7_wb_err_o),
|
.i7_wb_err_o(yi7_wb_err_o),
|
|
|
.t0_wb_cyc_o(z_wb_cyc_i),
|
.t0_wb_cyc_o(z_wb_cyc_i),
|
.t0_wb_stb_o(z_wb_stb_i),
|
.t0_wb_stb_o(z_wb_stb_i),
|
.t0_wb_cab_o(z_wb_cab_i),
|
|
.t0_wb_adr_o(z_wb_adr_i),
|
.t0_wb_adr_o(z_wb_adr_i),
|
.t0_wb_sel_o(z_wb_sel_i),
|
.t0_wb_sel_o(z_wb_sel_i),
|
.t0_wb_we_o(z_wb_we_i),
|
.t0_wb_we_o(z_wb_we_i),
|
.t0_wb_dat_o(z_wb_dat_i),
|
.t0_wb_dat_o(z_wb_dat_i),
|
.t0_wb_dat_i(z_wb_dat_t),
|
.t0_wb_dat_i(z_wb_dat_t),
|
| Line 872... |
Line 819... |
tc_si_to_mt #(t1_addr_w, t1_addr, t28i_addr_w, t2_addr, t3_addr,
|
tc_si_to_mt #(t1_addr_w, t1_addr, t28i_addr_w, t2_addr, t3_addr,
|
t4_addr, t5_addr, t6_addr, t7_addr, t8_addr) t18_ch_lower(
|
t4_addr, t5_addr, t6_addr, t7_addr, t8_addr) t18_ch_lower(
|
|
|
.i0_wb_cyc_i(z_wb_cyc_i),
|
.i0_wb_cyc_i(z_wb_cyc_i),
|
.i0_wb_stb_i(z_wb_stb_i),
|
.i0_wb_stb_i(z_wb_stb_i),
|
.i0_wb_cab_i(z_wb_cab_i),
|
|
.i0_wb_adr_i(z_wb_adr_i),
|
.i0_wb_adr_i(z_wb_adr_i),
|
.i0_wb_sel_i(z_wb_sel_i),
|
.i0_wb_sel_i(z_wb_sel_i),
|
.i0_wb_we_i(z_wb_we_i),
|
.i0_wb_we_i(z_wb_we_i),
|
.i0_wb_dat_i(z_wb_dat_i),
|
.i0_wb_dat_i(z_wb_dat_i),
|
.i0_wb_dat_o(z_wb_dat_t),
|
.i0_wb_dat_o(z_wb_dat_t),
|
.i0_wb_ack_o(z_wb_ack_t),
|
.i0_wb_ack_o(z_wb_ack_t),
|
.i0_wb_err_o(z_wb_err_t),
|
.i0_wb_err_o(z_wb_err_t),
|
|
|
.t0_wb_cyc_o(t1_wb_cyc_o),
|
.t0_wb_cyc_o(t1_wb_cyc_o),
|
.t0_wb_stb_o(t1_wb_stb_o),
|
.t0_wb_stb_o(t1_wb_stb_o),
|
.t0_wb_cab_o(t1_wb_cab_o),
|
|
.t0_wb_adr_o(t1_wb_adr_o),
|
.t0_wb_adr_o(t1_wb_adr_o),
|
.t0_wb_sel_o(t1_wb_sel_o),
|
.t0_wb_sel_o(t1_wb_sel_o),
|
.t0_wb_we_o(t1_wb_we_o),
|
.t0_wb_we_o(t1_wb_we_o),
|
.t0_wb_dat_o(t1_wb_dat_o),
|
.t0_wb_dat_o(t1_wb_dat_o),
|
.t0_wb_dat_i(t1_wb_dat_i),
|
.t0_wb_dat_i(t1_wb_dat_i),
|
.t0_wb_ack_i(t1_wb_ack_i),
|
.t0_wb_ack_i(t1_wb_ack_i),
|
.t0_wb_err_i(t1_wb_err_i),
|
.t0_wb_err_i(t1_wb_err_i),
|
|
|
.t1_wb_cyc_o(t2_wb_cyc_o),
|
.t1_wb_cyc_o(t2_wb_cyc_o),
|
.t1_wb_stb_o(t2_wb_stb_o),
|
.t1_wb_stb_o(t2_wb_stb_o),
|
.t1_wb_cab_o(t2_wb_cab_o),
|
|
.t1_wb_adr_o(t2_wb_adr_o),
|
.t1_wb_adr_o(t2_wb_adr_o),
|
.t1_wb_sel_o(t2_wb_sel_o),
|
.t1_wb_sel_o(t2_wb_sel_o),
|
.t1_wb_we_o(t2_wb_we_o),
|
.t1_wb_we_o(t2_wb_we_o),
|
.t1_wb_dat_o(t2_wb_dat_o),
|
.t1_wb_dat_o(t2_wb_dat_o),
|
.t1_wb_dat_i(t2_wb_dat_i),
|
.t1_wb_dat_i(t2_wb_dat_i),
|
.t1_wb_ack_i(t2_wb_ack_i),
|
.t1_wb_ack_i(t2_wb_ack_i),
|
.t1_wb_err_i(t2_wb_err_i),
|
.t1_wb_err_i(t2_wb_err_i),
|
|
|
.t2_wb_cyc_o(t3_wb_cyc_o),
|
.t2_wb_cyc_o(t3_wb_cyc_o),
|
.t2_wb_stb_o(t3_wb_stb_o),
|
.t2_wb_stb_o(t3_wb_stb_o),
|
.t2_wb_cab_o(t3_wb_cab_o),
|
|
.t2_wb_adr_o(t3_wb_adr_o),
|
.t2_wb_adr_o(t3_wb_adr_o),
|
.t2_wb_sel_o(t3_wb_sel_o),
|
.t2_wb_sel_o(t3_wb_sel_o),
|
.t2_wb_we_o(t3_wb_we_o),
|
.t2_wb_we_o(t3_wb_we_o),
|
.t2_wb_dat_o(t3_wb_dat_o),
|
.t2_wb_dat_o(t3_wb_dat_o),
|
.t2_wb_dat_i(t3_wb_dat_i),
|
.t2_wb_dat_i(t3_wb_dat_i),
|
.t2_wb_ack_i(t3_wb_ack_i),
|
.t2_wb_ack_i(t3_wb_ack_i),
|
.t2_wb_err_i(t3_wb_err_i),
|
.t2_wb_err_i(t3_wb_err_i),
|
|
|
.t3_wb_cyc_o(t4_wb_cyc_o),
|
.t3_wb_cyc_o(t4_wb_cyc_o),
|
.t3_wb_stb_o(t4_wb_stb_o),
|
.t3_wb_stb_o(t4_wb_stb_o),
|
.t3_wb_cab_o(t4_wb_cab_o),
|
|
.t3_wb_adr_o(t4_wb_adr_o),
|
.t3_wb_adr_o(t4_wb_adr_o),
|
.t3_wb_sel_o(t4_wb_sel_o),
|
.t3_wb_sel_o(t4_wb_sel_o),
|
.t3_wb_we_o(t4_wb_we_o),
|
.t3_wb_we_o(t4_wb_we_o),
|
.t3_wb_dat_o(t4_wb_dat_o),
|
.t3_wb_dat_o(t4_wb_dat_o),
|
.t3_wb_dat_i(t4_wb_dat_i),
|
.t3_wb_dat_i(t4_wb_dat_i),
|
.t3_wb_ack_i(t4_wb_ack_i),
|
.t3_wb_ack_i(t4_wb_ack_i),
|
.t3_wb_err_i(t4_wb_err_i),
|
.t3_wb_err_i(t4_wb_err_i),
|
|
|
.t4_wb_cyc_o(t5_wb_cyc_o),
|
.t4_wb_cyc_o(t5_wb_cyc_o),
|
.t4_wb_stb_o(t5_wb_stb_o),
|
.t4_wb_stb_o(t5_wb_stb_o),
|
.t4_wb_cab_o(t5_wb_cab_o),
|
|
.t4_wb_adr_o(t5_wb_adr_o),
|
.t4_wb_adr_o(t5_wb_adr_o),
|
.t4_wb_sel_o(t5_wb_sel_o),
|
.t4_wb_sel_o(t5_wb_sel_o),
|
.t4_wb_we_o(t5_wb_we_o),
|
.t4_wb_we_o(t5_wb_we_o),
|
.t4_wb_dat_o(t5_wb_dat_o),
|
.t4_wb_dat_o(t5_wb_dat_o),
|
.t4_wb_dat_i(t5_wb_dat_i),
|
.t4_wb_dat_i(t5_wb_dat_i),
|
.t4_wb_ack_i(t5_wb_ack_i),
|
.t4_wb_ack_i(t5_wb_ack_i),
|
.t4_wb_err_i(t5_wb_err_i),
|
.t4_wb_err_i(t5_wb_err_i),
|
|
|
.t5_wb_cyc_o(t6_wb_cyc_o),
|
.t5_wb_cyc_o(t6_wb_cyc_o),
|
.t5_wb_stb_o(t6_wb_stb_o),
|
.t5_wb_stb_o(t6_wb_stb_o),
|
.t5_wb_cab_o(t6_wb_cab_o),
|
|
.t5_wb_adr_o(t6_wb_adr_o),
|
.t5_wb_adr_o(t6_wb_adr_o),
|
.t5_wb_sel_o(t6_wb_sel_o),
|
.t5_wb_sel_o(t6_wb_sel_o),
|
.t5_wb_we_o(t6_wb_we_o),
|
.t5_wb_we_o(t6_wb_we_o),
|
.t5_wb_dat_o(t6_wb_dat_o),
|
.t5_wb_dat_o(t6_wb_dat_o),
|
.t5_wb_dat_i(t6_wb_dat_i),
|
.t5_wb_dat_i(t6_wb_dat_i),
|
.t5_wb_ack_i(t6_wb_ack_i),
|
.t5_wb_ack_i(t6_wb_ack_i),
|
.t5_wb_err_i(t6_wb_err_i),
|
.t5_wb_err_i(t6_wb_err_i),
|
|
|
.t6_wb_cyc_o(t7_wb_cyc_o),
|
.t6_wb_cyc_o(t7_wb_cyc_o),
|
.t6_wb_stb_o(t7_wb_stb_o),
|
.t6_wb_stb_o(t7_wb_stb_o),
|
.t6_wb_cab_o(t7_wb_cab_o),
|
|
.t6_wb_adr_o(t7_wb_adr_o),
|
.t6_wb_adr_o(t7_wb_adr_o),
|
.t6_wb_sel_o(t7_wb_sel_o),
|
.t6_wb_sel_o(t7_wb_sel_o),
|
.t6_wb_we_o(t7_wb_we_o),
|
.t6_wb_we_o(t7_wb_we_o),
|
.t6_wb_dat_o(t7_wb_dat_o),
|
.t6_wb_dat_o(t7_wb_dat_o),
|
.t6_wb_dat_i(t7_wb_dat_i),
|
.t6_wb_dat_i(t7_wb_dat_i),
|
.t6_wb_ack_i(t7_wb_ack_i),
|
.t6_wb_ack_i(t7_wb_ack_i),
|
.t6_wb_err_i(t7_wb_err_i),
|
.t6_wb_err_i(t7_wb_err_i),
|
|
|
.t7_wb_cyc_o(t8_wb_cyc_o),
|
.t7_wb_cyc_o(t8_wb_cyc_o),
|
.t7_wb_stb_o(t8_wb_stb_o),
|
.t7_wb_stb_o(t8_wb_stb_o),
|
.t7_wb_cab_o(t8_wb_cab_o),
|
|
.t7_wb_adr_o(t8_wb_adr_o),
|
.t7_wb_adr_o(t8_wb_adr_o),
|
.t7_wb_sel_o(t8_wb_sel_o),
|
.t7_wb_sel_o(t8_wb_sel_o),
|
.t7_wb_we_o(t8_wb_we_o),
|
.t7_wb_we_o(t8_wb_we_o),
|
.t7_wb_dat_o(t8_wb_dat_o),
|
.t7_wb_dat_o(t8_wb_dat_o),
|
.t7_wb_dat_i(t8_wb_dat_i),
|
.t7_wb_dat_i(t8_wb_dat_i),
|
| Line 982... |
Line 920... |
wb_clk_i,
|
wb_clk_i,
|
wb_rst_i,
|
wb_rst_i,
|
|
|
i0_wb_cyc_i,
|
i0_wb_cyc_i,
|
i0_wb_stb_i,
|
i0_wb_stb_i,
|
i0_wb_cab_i,
|
|
i0_wb_adr_i,
|
i0_wb_adr_i,
|
i0_wb_sel_i,
|
i0_wb_sel_i,
|
i0_wb_we_i,
|
i0_wb_we_i,
|
i0_wb_dat_i,
|
i0_wb_dat_i,
|
i0_wb_dat_o,
|
i0_wb_dat_o,
|
i0_wb_ack_o,
|
i0_wb_ack_o,
|
i0_wb_err_o,
|
i0_wb_err_o,
|
|
|
i1_wb_cyc_i,
|
i1_wb_cyc_i,
|
i1_wb_stb_i,
|
i1_wb_stb_i,
|
i1_wb_cab_i,
|
|
i1_wb_adr_i,
|
i1_wb_adr_i,
|
i1_wb_sel_i,
|
i1_wb_sel_i,
|
i1_wb_we_i,
|
i1_wb_we_i,
|
i1_wb_dat_i,
|
i1_wb_dat_i,
|
i1_wb_dat_o,
|
i1_wb_dat_o,
|
i1_wb_ack_o,
|
i1_wb_ack_o,
|
i1_wb_err_o,
|
i1_wb_err_o,
|
|
|
i2_wb_cyc_i,
|
i2_wb_cyc_i,
|
i2_wb_stb_i,
|
i2_wb_stb_i,
|
i2_wb_cab_i,
|
|
i2_wb_adr_i,
|
i2_wb_adr_i,
|
i2_wb_sel_i,
|
i2_wb_sel_i,
|
i2_wb_we_i,
|
i2_wb_we_i,
|
i2_wb_dat_i,
|
i2_wb_dat_i,
|
i2_wb_dat_o,
|
i2_wb_dat_o,
|
i2_wb_ack_o,
|
i2_wb_ack_o,
|
i2_wb_err_o,
|
i2_wb_err_o,
|
|
|
i3_wb_cyc_i,
|
i3_wb_cyc_i,
|
i3_wb_stb_i,
|
i3_wb_stb_i,
|
i3_wb_cab_i,
|
|
i3_wb_adr_i,
|
i3_wb_adr_i,
|
i3_wb_sel_i,
|
i3_wb_sel_i,
|
i3_wb_we_i,
|
i3_wb_we_i,
|
i3_wb_dat_i,
|
i3_wb_dat_i,
|
i3_wb_dat_o,
|
i3_wb_dat_o,
|
i3_wb_ack_o,
|
i3_wb_ack_o,
|
i3_wb_err_o,
|
i3_wb_err_o,
|
|
|
i4_wb_cyc_i,
|
i4_wb_cyc_i,
|
i4_wb_stb_i,
|
i4_wb_stb_i,
|
i4_wb_cab_i,
|
|
i4_wb_adr_i,
|
i4_wb_adr_i,
|
i4_wb_sel_i,
|
i4_wb_sel_i,
|
i4_wb_we_i,
|
i4_wb_we_i,
|
i4_wb_dat_i,
|
i4_wb_dat_i,
|
i4_wb_dat_o,
|
i4_wb_dat_o,
|
i4_wb_ack_o,
|
i4_wb_ack_o,
|
i4_wb_err_o,
|
i4_wb_err_o,
|
|
|
i5_wb_cyc_i,
|
i5_wb_cyc_i,
|
i5_wb_stb_i,
|
i5_wb_stb_i,
|
i5_wb_cab_i,
|
|
i5_wb_adr_i,
|
i5_wb_adr_i,
|
i5_wb_sel_i,
|
i5_wb_sel_i,
|
i5_wb_we_i,
|
i5_wb_we_i,
|
i5_wb_dat_i,
|
i5_wb_dat_i,
|
i5_wb_dat_o,
|
i5_wb_dat_o,
|
i5_wb_ack_o,
|
i5_wb_ack_o,
|
i5_wb_err_o,
|
i5_wb_err_o,
|
|
|
i6_wb_cyc_i,
|
i6_wb_cyc_i,
|
i6_wb_stb_i,
|
i6_wb_stb_i,
|
i6_wb_cab_i,
|
|
i6_wb_adr_i,
|
i6_wb_adr_i,
|
i6_wb_sel_i,
|
i6_wb_sel_i,
|
i6_wb_we_i,
|
i6_wb_we_i,
|
i6_wb_dat_i,
|
i6_wb_dat_i,
|
i6_wb_dat_o,
|
i6_wb_dat_o,
|
i6_wb_ack_o,
|
i6_wb_ack_o,
|
i6_wb_err_o,
|
i6_wb_err_o,
|
|
|
i7_wb_cyc_i,
|
i7_wb_cyc_i,
|
i7_wb_stb_i,
|
i7_wb_stb_i,
|
i7_wb_cab_i,
|
|
i7_wb_adr_i,
|
i7_wb_adr_i,
|
i7_wb_sel_i,
|
i7_wb_sel_i,
|
i7_wb_we_i,
|
i7_wb_we_i,
|
i7_wb_dat_i,
|
i7_wb_dat_i,
|
i7_wb_dat_o,
|
i7_wb_dat_o,
|
i7_wb_ack_o,
|
i7_wb_ack_o,
|
i7_wb_err_o,
|
i7_wb_err_o,
|
|
|
t0_wb_cyc_o,
|
t0_wb_cyc_o,
|
t0_wb_stb_o,
|
t0_wb_stb_o,
|
t0_wb_cab_o,
|
|
t0_wb_adr_o,
|
t0_wb_adr_o,
|
t0_wb_sel_o,
|
t0_wb_sel_o,
|
t0_wb_we_o,
|
t0_wb_we_o,
|
t0_wb_dat_o,
|
t0_wb_dat_o,
|
t0_wb_dat_i,
|
t0_wb_dat_i,
|
| Line 1101... |
Line 1030... |
//
|
//
|
// WB slave i/f connecting initiator 0
|
// WB slave i/f connecting initiator 0
|
//
|
//
|
input i0_wb_cyc_i;
|
input i0_wb_cyc_i;
|
input i0_wb_stb_i;
|
input i0_wb_stb_i;
|
input i0_wb_cab_i;
|
|
input [`TC_AW-1:0] i0_wb_adr_i;
|
input [`TC_AW-1:0] i0_wb_adr_i;
|
input [`TC_BSW-1:0] i0_wb_sel_i;
|
input [`TC_BSW-1:0] i0_wb_sel_i;
|
input i0_wb_we_i;
|
input i0_wb_we_i;
|
input [`TC_DW-1:0] i0_wb_dat_i;
|
input [`TC_DW-1:0] i0_wb_dat_i;
|
output [`TC_DW-1:0] i0_wb_dat_o;
|
output [`TC_DW-1:0] i0_wb_dat_o;
|
| Line 1115... |
Line 1043... |
//
|
//
|
// WB slave i/f connecting initiator 1
|
// WB slave i/f connecting initiator 1
|
//
|
//
|
input i1_wb_cyc_i;
|
input i1_wb_cyc_i;
|
input i1_wb_stb_i;
|
input i1_wb_stb_i;
|
input i1_wb_cab_i;
|
|
input [`TC_AW-1:0] i1_wb_adr_i;
|
input [`TC_AW-1:0] i1_wb_adr_i;
|
input [`TC_BSW-1:0] i1_wb_sel_i;
|
input [`TC_BSW-1:0] i1_wb_sel_i;
|
input i1_wb_we_i;
|
input i1_wb_we_i;
|
input [`TC_DW-1:0] i1_wb_dat_i;
|
input [`TC_DW-1:0] i1_wb_dat_i;
|
output [`TC_DW-1:0] i1_wb_dat_o;
|
output [`TC_DW-1:0] i1_wb_dat_o;
|
| Line 1129... |
Line 1056... |
//
|
//
|
// WB slave i/f connecting initiator 2
|
// WB slave i/f connecting initiator 2
|
//
|
//
|
input i2_wb_cyc_i;
|
input i2_wb_cyc_i;
|
input i2_wb_stb_i;
|
input i2_wb_stb_i;
|
input i2_wb_cab_i;
|
|
input [`TC_AW-1:0] i2_wb_adr_i;
|
input [`TC_AW-1:0] i2_wb_adr_i;
|
input [`TC_BSW-1:0] i2_wb_sel_i;
|
input [`TC_BSW-1:0] i2_wb_sel_i;
|
input i2_wb_we_i;
|
input i2_wb_we_i;
|
input [`TC_DW-1:0] i2_wb_dat_i;
|
input [`TC_DW-1:0] i2_wb_dat_i;
|
output [`TC_DW-1:0] i2_wb_dat_o;
|
output [`TC_DW-1:0] i2_wb_dat_o;
|
| Line 1143... |
Line 1069... |
//
|
//
|
// WB slave i/f connecting initiator 3
|
// WB slave i/f connecting initiator 3
|
//
|
//
|
input i3_wb_cyc_i;
|
input i3_wb_cyc_i;
|
input i3_wb_stb_i;
|
input i3_wb_stb_i;
|
input i3_wb_cab_i;
|
|
input [`TC_AW-1:0] i3_wb_adr_i;
|
input [`TC_AW-1:0] i3_wb_adr_i;
|
input [`TC_BSW-1:0] i3_wb_sel_i;
|
input [`TC_BSW-1:0] i3_wb_sel_i;
|
input i3_wb_we_i;
|
input i3_wb_we_i;
|
input [`TC_DW-1:0] i3_wb_dat_i;
|
input [`TC_DW-1:0] i3_wb_dat_i;
|
output [`TC_DW-1:0] i3_wb_dat_o;
|
output [`TC_DW-1:0] i3_wb_dat_o;
|
| Line 1157... |
Line 1082... |
//
|
//
|
// WB slave i/f connecting initiator 4
|
// WB slave i/f connecting initiator 4
|
//
|
//
|
input i4_wb_cyc_i;
|
input i4_wb_cyc_i;
|
input i4_wb_stb_i;
|
input i4_wb_stb_i;
|
input i4_wb_cab_i;
|
|
input [`TC_AW-1:0] i4_wb_adr_i;
|
input [`TC_AW-1:0] i4_wb_adr_i;
|
input [`TC_BSW-1:0] i4_wb_sel_i;
|
input [`TC_BSW-1:0] i4_wb_sel_i;
|
input i4_wb_we_i;
|
input i4_wb_we_i;
|
input [`TC_DW-1:0] i4_wb_dat_i;
|
input [`TC_DW-1:0] i4_wb_dat_i;
|
output [`TC_DW-1:0] i4_wb_dat_o;
|
output [`TC_DW-1:0] i4_wb_dat_o;
|
| Line 1171... |
Line 1095... |
//
|
//
|
// WB slave i/f connecting initiator 5
|
// WB slave i/f connecting initiator 5
|
//
|
//
|
input i5_wb_cyc_i;
|
input i5_wb_cyc_i;
|
input i5_wb_stb_i;
|
input i5_wb_stb_i;
|
input i5_wb_cab_i;
|
|
input [`TC_AW-1:0] i5_wb_adr_i;
|
input [`TC_AW-1:0] i5_wb_adr_i;
|
input [`TC_BSW-1:0] i5_wb_sel_i;
|
input [`TC_BSW-1:0] i5_wb_sel_i;
|
input i5_wb_we_i;
|
input i5_wb_we_i;
|
input [`TC_DW-1:0] i5_wb_dat_i;
|
input [`TC_DW-1:0] i5_wb_dat_i;
|
output [`TC_DW-1:0] i5_wb_dat_o;
|
output [`TC_DW-1:0] i5_wb_dat_o;
|
| Line 1185... |
Line 1108... |
//
|
//
|
// WB slave i/f connecting initiator 6
|
// WB slave i/f connecting initiator 6
|
//
|
//
|
input i6_wb_cyc_i;
|
input i6_wb_cyc_i;
|
input i6_wb_stb_i;
|
input i6_wb_stb_i;
|
input i6_wb_cab_i;
|
|
input [`TC_AW-1:0] i6_wb_adr_i;
|
input [`TC_AW-1:0] i6_wb_adr_i;
|
input [`TC_BSW-1:0] i6_wb_sel_i;
|
input [`TC_BSW-1:0] i6_wb_sel_i;
|
input i6_wb_we_i;
|
input i6_wb_we_i;
|
input [`TC_DW-1:0] i6_wb_dat_i;
|
input [`TC_DW-1:0] i6_wb_dat_i;
|
output [`TC_DW-1:0] i6_wb_dat_o;
|
output [`TC_DW-1:0] i6_wb_dat_o;
|
| Line 1199... |
Line 1121... |
//
|
//
|
// WB slave i/f connecting initiator 7
|
// WB slave i/f connecting initiator 7
|
//
|
//
|
input i7_wb_cyc_i;
|
input i7_wb_cyc_i;
|
input i7_wb_stb_i;
|
input i7_wb_stb_i;
|
input i7_wb_cab_i;
|
|
input [`TC_AW-1:0] i7_wb_adr_i;
|
input [`TC_AW-1:0] i7_wb_adr_i;
|
input [`TC_BSW-1:0] i7_wb_sel_i;
|
input [`TC_BSW-1:0] i7_wb_sel_i;
|
input i7_wb_we_i;
|
input i7_wb_we_i;
|
input [`TC_DW-1:0] i7_wb_dat_i;
|
input [`TC_DW-1:0] i7_wb_dat_i;
|
output [`TC_DW-1:0] i7_wb_dat_o;
|
output [`TC_DW-1:0] i7_wb_dat_o;
|
| Line 1213... |
Line 1134... |
//
|
//
|
// WB master i/f connecting target
|
// WB master i/f connecting target
|
//
|
//
|
output t0_wb_cyc_o;
|
output t0_wb_cyc_o;
|
output t0_wb_stb_o;
|
output t0_wb_stb_o;
|
output t0_wb_cab_o;
|
|
output [`TC_AW-1:0] t0_wb_adr_o;
|
output [`TC_AW-1:0] t0_wb_adr_o;
|
output [`TC_BSW-1:0] t0_wb_sel_o;
|
output [`TC_BSW-1:0] t0_wb_sel_o;
|
output t0_wb_we_o;
|
output t0_wb_we_o;
|
output [`TC_DW-1:0] t0_wb_dat_o;
|
output [`TC_DW-1:0] t0_wb_dat_o;
|
input [`TC_DW-1:0] t0_wb_dat_i;
|
input [`TC_DW-1:0] t0_wb_dat_i;
|
| Line 1243... |
Line 1163... |
reg [2:0] req_r;
|
reg [2:0] req_r;
|
|
|
//
|
//
|
// Group WB initiator 0 i/f inputs and outputs
|
// Group WB initiator 0 i/f inputs and outputs
|
//
|
//
|
assign i0_in = {i0_wb_cyc_i, i0_wb_stb_i, i0_wb_cab_i, i0_wb_adr_i,
|
assign i0_in = {i0_wb_cyc_i, i0_wb_stb_i, i0_wb_adr_i,
|
i0_wb_sel_i, i0_wb_we_i, i0_wb_dat_i};
|
i0_wb_sel_i, i0_wb_we_i, i0_wb_dat_i};
|
assign {i0_wb_dat_o, i0_wb_ack_o, i0_wb_err_o} = i0_out;
|
assign {i0_wb_dat_o, i0_wb_ack_o, i0_wb_err_o} = i0_out;
|
|
|
//
|
//
|
// Group WB initiator 1 i/f inputs and outputs
|
// Group WB initiator 1 i/f inputs and outputs
|
//
|
//
|
assign i1_in = {i1_wb_cyc_i, i1_wb_stb_i, i1_wb_cab_i, i1_wb_adr_i,
|
assign i1_in = {i1_wb_cyc_i, i1_wb_stb_i, i1_wb_adr_i,
|
i1_wb_sel_i, i1_wb_we_i, i1_wb_dat_i};
|
i1_wb_sel_i, i1_wb_we_i, i1_wb_dat_i};
|
assign {i1_wb_dat_o, i1_wb_ack_o, i1_wb_err_o} = i1_out;
|
assign {i1_wb_dat_o, i1_wb_ack_o, i1_wb_err_o} = i1_out;
|
|
|
//
|
//
|
// Group WB initiator 2 i/f inputs and outputs
|
// Group WB initiator 2 i/f inputs and outputs
|
//
|
//
|
assign i2_in = {i2_wb_cyc_i, i2_wb_stb_i, i2_wb_cab_i, i2_wb_adr_i,
|
assign i2_in = {i2_wb_cyc_i, i2_wb_stb_i, i2_wb_adr_i,
|
i2_wb_sel_i, i2_wb_we_i, i2_wb_dat_i};
|
i2_wb_sel_i, i2_wb_we_i, i2_wb_dat_i};
|
assign {i2_wb_dat_o, i2_wb_ack_o, i2_wb_err_o} = i2_out;
|
assign {i2_wb_dat_o, i2_wb_ack_o, i2_wb_err_o} = i2_out;
|
|
|
//
|
//
|
// Group WB initiator 3 i/f inputs and outputs
|
// Group WB initiator 3 i/f inputs and outputs
|
//
|
//
|
assign i3_in = {i3_wb_cyc_i, i3_wb_stb_i, i3_wb_cab_i, i3_wb_adr_i,
|
assign i3_in = {i3_wb_cyc_i, i3_wb_stb_i, i3_wb_adr_i,
|
i3_wb_sel_i, i3_wb_we_i, i3_wb_dat_i};
|
i3_wb_sel_i, i3_wb_we_i, i3_wb_dat_i};
|
assign {i3_wb_dat_o, i3_wb_ack_o, i3_wb_err_o} = i3_out;
|
assign {i3_wb_dat_o, i3_wb_ack_o, i3_wb_err_o} = i3_out;
|
|
|
//
|
//
|
// Group WB initiator 4 i/f inputs and outputs
|
// Group WB initiator 4 i/f inputs and outputs
|
//
|
//
|
assign i4_in = {i4_wb_cyc_i, i4_wb_stb_i, i4_wb_cab_i, i4_wb_adr_i,
|
assign i4_in = {i4_wb_cyc_i, i4_wb_stb_i, i4_wb_adr_i,
|
i4_wb_sel_i, i4_wb_we_i, i4_wb_dat_i};
|
i4_wb_sel_i, i4_wb_we_i, i4_wb_dat_i};
|
assign {i4_wb_dat_o, i4_wb_ack_o, i4_wb_err_o} = i4_out;
|
assign {i4_wb_dat_o, i4_wb_ack_o, i4_wb_err_o} = i4_out;
|
|
|
//
|
//
|
// Group WB initiator 5 i/f inputs and outputs
|
// Group WB initiator 5 i/f inputs and outputs
|
//
|
//
|
assign i5_in = {i5_wb_cyc_i, i5_wb_stb_i, i5_wb_cab_i, i5_wb_adr_i,
|
assign i5_in = {i5_wb_cyc_i, i5_wb_stb_i, i5_wb_adr_i,
|
i5_wb_sel_i, i5_wb_we_i, i5_wb_dat_i};
|
i5_wb_sel_i, i5_wb_we_i, i5_wb_dat_i};
|
assign {i5_wb_dat_o, i5_wb_ack_o, i5_wb_err_o} = i5_out;
|
assign {i5_wb_dat_o, i5_wb_ack_o, i5_wb_err_o} = i5_out;
|
|
|
//
|
//
|
// Group WB initiator 6 i/f inputs and outputs
|
// Group WB initiator 6 i/f inputs and outputs
|
//
|
//
|
assign i6_in = {i6_wb_cyc_i, i6_wb_stb_i, i6_wb_cab_i, i6_wb_adr_i,
|
assign i6_in = {i6_wb_cyc_i, i6_wb_stb_i, i6_wb_adr_i,
|
i6_wb_sel_i, i6_wb_we_i, i6_wb_dat_i};
|
i6_wb_sel_i, i6_wb_we_i, i6_wb_dat_i};
|
assign {i6_wb_dat_o, i6_wb_ack_o, i6_wb_err_o} = i6_out;
|
assign {i6_wb_dat_o, i6_wb_ack_o, i6_wb_err_o} = i6_out;
|
|
|
//
|
//
|
// Group WB initiator 7 i/f inputs and outputs
|
// Group WB initiator 7 i/f inputs and outputs
|
//
|
//
|
assign i7_in = {i7_wb_cyc_i, i7_wb_stb_i, i7_wb_cab_i, i7_wb_adr_i,
|
assign i7_in = {i7_wb_cyc_i, i7_wb_stb_i, i7_wb_adr_i,
|
i7_wb_sel_i, i7_wb_we_i, i7_wb_dat_i};
|
i7_wb_sel_i, i7_wb_we_i, i7_wb_dat_i};
|
assign {i7_wb_dat_o, i7_wb_ack_o, i7_wb_err_o} = i7_out;
|
assign {i7_wb_dat_o, i7_wb_ack_o, i7_wb_err_o} = i7_out;
|
|
|
//
|
//
|
// Group WB target 0 i/f inputs and outputs
|
// Group WB target 0 i/f inputs and outputs
|
//
|
//
|
assign {t0_wb_cyc_o, t0_wb_stb_o, t0_wb_cab_o, t0_wb_adr_o,
|
assign {t0_wb_cyc_o, t0_wb_stb_o, t0_wb_adr_o,
|
t0_wb_sel_o, t0_wb_we_o, t0_wb_dat_o} = t0_out;
|
t0_wb_sel_o, t0_wb_we_o, t0_wb_dat_o} = t0_out;
|
assign t0_in = {t0_wb_dat_i, t0_wb_ack_i, t0_wb_err_i};
|
assign t0_in = {t0_wb_dat_i, t0_wb_ack_i, t0_wb_err_i};
|
|
|
//
|
//
|
// Assign to WB initiator i/f outputs
|
// Assign to WB initiator i/f outputs
|
| Line 1414... |
Line 1334... |
//
|
//
|
module tc_si_to_mt (
|
module tc_si_to_mt (
|
|
|
i0_wb_cyc_i,
|
i0_wb_cyc_i,
|
i0_wb_stb_i,
|
i0_wb_stb_i,
|
i0_wb_cab_i,
|
|
i0_wb_adr_i,
|
i0_wb_adr_i,
|
i0_wb_sel_i,
|
i0_wb_sel_i,
|
i0_wb_we_i,
|
i0_wb_we_i,
|
i0_wb_dat_i,
|
i0_wb_dat_i,
|
i0_wb_dat_o,
|
i0_wb_dat_o,
|
i0_wb_ack_o,
|
i0_wb_ack_o,
|
i0_wb_err_o,
|
i0_wb_err_o,
|
|
|
t0_wb_cyc_o,
|
t0_wb_cyc_o,
|
t0_wb_stb_o,
|
t0_wb_stb_o,
|
t0_wb_cab_o,
|
|
t0_wb_adr_o,
|
t0_wb_adr_o,
|
t0_wb_sel_o,
|
t0_wb_sel_o,
|
t0_wb_we_o,
|
t0_wb_we_o,
|
t0_wb_dat_o,
|
t0_wb_dat_o,
|
t0_wb_dat_i,
|
t0_wb_dat_i,
|
t0_wb_ack_i,
|
t0_wb_ack_i,
|
t0_wb_err_i,
|
t0_wb_err_i,
|
|
|
t1_wb_cyc_o,
|
t1_wb_cyc_o,
|
t1_wb_stb_o,
|
t1_wb_stb_o,
|
t1_wb_cab_o,
|
|
t1_wb_adr_o,
|
t1_wb_adr_o,
|
t1_wb_sel_o,
|
t1_wb_sel_o,
|
t1_wb_we_o,
|
t1_wb_we_o,
|
t1_wb_dat_o,
|
t1_wb_dat_o,
|
t1_wb_dat_i,
|
t1_wb_dat_i,
|
t1_wb_ack_i,
|
t1_wb_ack_i,
|
t1_wb_err_i,
|
t1_wb_err_i,
|
|
|
t2_wb_cyc_o,
|
t2_wb_cyc_o,
|
t2_wb_stb_o,
|
t2_wb_stb_o,
|
t2_wb_cab_o,
|
|
t2_wb_adr_o,
|
t2_wb_adr_o,
|
t2_wb_sel_o,
|
t2_wb_sel_o,
|
t2_wb_we_o,
|
t2_wb_we_o,
|
t2_wb_dat_o,
|
t2_wb_dat_o,
|
t2_wb_dat_i,
|
t2_wb_dat_i,
|
t2_wb_ack_i,
|
t2_wb_ack_i,
|
t2_wb_err_i,
|
t2_wb_err_i,
|
|
|
t3_wb_cyc_o,
|
t3_wb_cyc_o,
|
t3_wb_stb_o,
|
t3_wb_stb_o,
|
t3_wb_cab_o,
|
|
t3_wb_adr_o,
|
t3_wb_adr_o,
|
t3_wb_sel_o,
|
t3_wb_sel_o,
|
t3_wb_we_o,
|
t3_wb_we_o,
|
t3_wb_dat_o,
|
t3_wb_dat_o,
|
t3_wb_dat_i,
|
t3_wb_dat_i,
|
t3_wb_ack_i,
|
t3_wb_ack_i,
|
t3_wb_err_i,
|
t3_wb_err_i,
|
|
|
t4_wb_cyc_o,
|
t4_wb_cyc_o,
|
t4_wb_stb_o,
|
t4_wb_stb_o,
|
t4_wb_cab_o,
|
|
t4_wb_adr_o,
|
t4_wb_adr_o,
|
t4_wb_sel_o,
|
t4_wb_sel_o,
|
t4_wb_we_o,
|
t4_wb_we_o,
|
t4_wb_dat_o,
|
t4_wb_dat_o,
|
t4_wb_dat_i,
|
t4_wb_dat_i,
|
t4_wb_ack_i,
|
t4_wb_ack_i,
|
t4_wb_err_i,
|
t4_wb_err_i,
|
|
|
t5_wb_cyc_o,
|
t5_wb_cyc_o,
|
t5_wb_stb_o,
|
t5_wb_stb_o,
|
t5_wb_cab_o,
|
|
t5_wb_adr_o,
|
t5_wb_adr_o,
|
t5_wb_sel_o,
|
t5_wb_sel_o,
|
t5_wb_we_o,
|
t5_wb_we_o,
|
t5_wb_dat_o,
|
t5_wb_dat_o,
|
t5_wb_dat_i,
|
t5_wb_dat_i,
|
t5_wb_ack_i,
|
t5_wb_ack_i,
|
t5_wb_err_i,
|
t5_wb_err_i,
|
|
|
t6_wb_cyc_o,
|
t6_wb_cyc_o,
|
t6_wb_stb_o,
|
t6_wb_stb_o,
|
t6_wb_cab_o,
|
|
t6_wb_adr_o,
|
t6_wb_adr_o,
|
t6_wb_sel_o,
|
t6_wb_sel_o,
|
t6_wb_we_o,
|
t6_wb_we_o,
|
t6_wb_dat_o,
|
t6_wb_dat_o,
|
t6_wb_dat_i,
|
t6_wb_dat_i,
|
t6_wb_ack_i,
|
t6_wb_ack_i,
|
t6_wb_err_i,
|
t6_wb_err_i,
|
|
|
t7_wb_cyc_o,
|
t7_wb_cyc_o,
|
t7_wb_stb_o,
|
t7_wb_stb_o,
|
t7_wb_cab_o,
|
|
t7_wb_adr_o,
|
t7_wb_adr_o,
|
t7_wb_sel_o,
|
t7_wb_sel_o,
|
t7_wb_we_o,
|
t7_wb_we_o,
|
t7_wb_dat_o,
|
t7_wb_dat_o,
|
t7_wb_dat_i,
|
t7_wb_dat_i,
|
| Line 1536... |
Line 1447... |
//
|
//
|
// WB slave i/f connecting initiator 0
|
// WB slave i/f connecting initiator 0
|
//
|
//
|
input i0_wb_cyc_i;
|
input i0_wb_cyc_i;
|
input i0_wb_stb_i;
|
input i0_wb_stb_i;
|
input i0_wb_cab_i;
|
|
input [`TC_AW-1:0] i0_wb_adr_i;
|
input [`TC_AW-1:0] i0_wb_adr_i;
|
input [`TC_BSW-1:0] i0_wb_sel_i;
|
input [`TC_BSW-1:0] i0_wb_sel_i;
|
input i0_wb_we_i;
|
input i0_wb_we_i;
|
input [`TC_DW-1:0] i0_wb_dat_i;
|
input [`TC_DW-1:0] i0_wb_dat_i;
|
output [`TC_DW-1:0] i0_wb_dat_o;
|
output [`TC_DW-1:0] i0_wb_dat_o;
|
| Line 1550... |
Line 1460... |
//
|
//
|
// WB master i/f connecting target 0
|
// WB master i/f connecting target 0
|
//
|
//
|
output t0_wb_cyc_o;
|
output t0_wb_cyc_o;
|
output t0_wb_stb_o;
|
output t0_wb_stb_o;
|
output t0_wb_cab_o;
|
|
output [`TC_AW-1:0] t0_wb_adr_o;
|
output [`TC_AW-1:0] t0_wb_adr_o;
|
output [`TC_BSW-1:0] t0_wb_sel_o;
|
output [`TC_BSW-1:0] t0_wb_sel_o;
|
output t0_wb_we_o;
|
output t0_wb_we_o;
|
output [`TC_DW-1:0] t0_wb_dat_o;
|
output [`TC_DW-1:0] t0_wb_dat_o;
|
input [`TC_DW-1:0] t0_wb_dat_i;
|
input [`TC_DW-1:0] t0_wb_dat_i;
|
| Line 1564... |
Line 1473... |
//
|
//
|
// WB master i/f connecting target 1
|
// WB master i/f connecting target 1
|
//
|
//
|
output t1_wb_cyc_o;
|
output t1_wb_cyc_o;
|
output t1_wb_stb_o;
|
output t1_wb_stb_o;
|
output t1_wb_cab_o;
|
|
output [`TC_AW-1:0] t1_wb_adr_o;
|
output [`TC_AW-1:0] t1_wb_adr_o;
|
output [`TC_BSW-1:0] t1_wb_sel_o;
|
output [`TC_BSW-1:0] t1_wb_sel_o;
|
output t1_wb_we_o;
|
output t1_wb_we_o;
|
output [`TC_DW-1:0] t1_wb_dat_o;
|
output [`TC_DW-1:0] t1_wb_dat_o;
|
input [`TC_DW-1:0] t1_wb_dat_i;
|
input [`TC_DW-1:0] t1_wb_dat_i;
|
| Line 1578... |
Line 1486... |
//
|
//
|
// WB master i/f connecting target 2
|
// WB master i/f connecting target 2
|
//
|
//
|
output t2_wb_cyc_o;
|
output t2_wb_cyc_o;
|
output t2_wb_stb_o;
|
output t2_wb_stb_o;
|
output t2_wb_cab_o;
|
|
output [`TC_AW-1:0] t2_wb_adr_o;
|
output [`TC_AW-1:0] t2_wb_adr_o;
|
output [`TC_BSW-1:0] t2_wb_sel_o;
|
output [`TC_BSW-1:0] t2_wb_sel_o;
|
output t2_wb_we_o;
|
output t2_wb_we_o;
|
output [`TC_DW-1:0] t2_wb_dat_o;
|
output [`TC_DW-1:0] t2_wb_dat_o;
|
input [`TC_DW-1:0] t2_wb_dat_i;
|
input [`TC_DW-1:0] t2_wb_dat_i;
|
| Line 1592... |
Line 1499... |
//
|
//
|
// WB master i/f connecting target 3
|
// WB master i/f connecting target 3
|
//
|
//
|
output t3_wb_cyc_o;
|
output t3_wb_cyc_o;
|
output t3_wb_stb_o;
|
output t3_wb_stb_o;
|
output t3_wb_cab_o;
|
|
output [`TC_AW-1:0] t3_wb_adr_o;
|
output [`TC_AW-1:0] t3_wb_adr_o;
|
output [`TC_BSW-1:0] t3_wb_sel_o;
|
output [`TC_BSW-1:0] t3_wb_sel_o;
|
output t3_wb_we_o;
|
output t3_wb_we_o;
|
output [`TC_DW-1:0] t3_wb_dat_o;
|
output [`TC_DW-1:0] t3_wb_dat_o;
|
input [`TC_DW-1:0] t3_wb_dat_i;
|
input [`TC_DW-1:0] t3_wb_dat_i;
|
| Line 1606... |
Line 1512... |
//
|
//
|
// WB master i/f connecting target 4
|
// WB master i/f connecting target 4
|
//
|
//
|
output t4_wb_cyc_o;
|
output t4_wb_cyc_o;
|
output t4_wb_stb_o;
|
output t4_wb_stb_o;
|
output t4_wb_cab_o;
|
|
output [`TC_AW-1:0] t4_wb_adr_o;
|
output [`TC_AW-1:0] t4_wb_adr_o;
|
output [`TC_BSW-1:0] t4_wb_sel_o;
|
output [`TC_BSW-1:0] t4_wb_sel_o;
|
output t4_wb_we_o;
|
output t4_wb_we_o;
|
output [`TC_DW-1:0] t4_wb_dat_o;
|
output [`TC_DW-1:0] t4_wb_dat_o;
|
input [`TC_DW-1:0] t4_wb_dat_i;
|
input [`TC_DW-1:0] t4_wb_dat_i;
|
| Line 1620... |
Line 1525... |
//
|
//
|
// WB master i/f connecting target 5
|
// WB master i/f connecting target 5
|
//
|
//
|
output t5_wb_cyc_o;
|
output t5_wb_cyc_o;
|
output t5_wb_stb_o;
|
output t5_wb_stb_o;
|
output t5_wb_cab_o;
|
|
output [`TC_AW-1:0] t5_wb_adr_o;
|
output [`TC_AW-1:0] t5_wb_adr_o;
|
output [`TC_BSW-1:0] t5_wb_sel_o;
|
output [`TC_BSW-1:0] t5_wb_sel_o;
|
output t5_wb_we_o;
|
output t5_wb_we_o;
|
output [`TC_DW-1:0] t5_wb_dat_o;
|
output [`TC_DW-1:0] t5_wb_dat_o;
|
input [`TC_DW-1:0] t5_wb_dat_i;
|
input [`TC_DW-1:0] t5_wb_dat_i;
|
| Line 1634... |
Line 1538... |
//
|
//
|
// WB master i/f connecting target 6
|
// WB master i/f connecting target 6
|
//
|
//
|
output t6_wb_cyc_o;
|
output t6_wb_cyc_o;
|
output t6_wb_stb_o;
|
output t6_wb_stb_o;
|
output t6_wb_cab_o;
|
|
output [`TC_AW-1:0] t6_wb_adr_o;
|
output [`TC_AW-1:0] t6_wb_adr_o;
|
output [`TC_BSW-1:0] t6_wb_sel_o;
|
output [`TC_BSW-1:0] t6_wb_sel_o;
|
output t6_wb_we_o;
|
output t6_wb_we_o;
|
output [`TC_DW-1:0] t6_wb_dat_o;
|
output [`TC_DW-1:0] t6_wb_dat_o;
|
input [`TC_DW-1:0] t6_wb_dat_i;
|
input [`TC_DW-1:0] t6_wb_dat_i;
|
| Line 1648... |
Line 1551... |
//
|
//
|
// WB master i/f connecting target 7
|
// WB master i/f connecting target 7
|
//
|
//
|
output t7_wb_cyc_o;
|
output t7_wb_cyc_o;
|
output t7_wb_stb_o;
|
output t7_wb_stb_o;
|
output t7_wb_cab_o;
|
|
output [`TC_AW-1:0] t7_wb_adr_o;
|
output [`TC_AW-1:0] t7_wb_adr_o;
|
output [`TC_BSW-1:0] t7_wb_sel_o;
|
output [`TC_BSW-1:0] t7_wb_sel_o;
|
output t7_wb_we_o;
|
output t7_wb_we_o;
|
output [`TC_DW-1:0] t7_wb_dat_o;
|
output [`TC_DW-1:0] t7_wb_dat_o;
|
input [`TC_DW-1:0] t7_wb_dat_i;
|
input [`TC_DW-1:0] t7_wb_dat_i;
|
| Line 1675... |
Line 1577... |
wire [7:0] req_t;
|
wire [7:0] req_t;
|
|
|
//
|
//
|
// Group WB initiator 0 i/f inputs and outputs
|
// Group WB initiator 0 i/f inputs and outputs
|
//
|
//
|
assign i0_in = {i0_wb_cyc_i, i0_wb_stb_i, i0_wb_cab_i, i0_wb_adr_i,
|
assign i0_in = {i0_wb_cyc_i, i0_wb_stb_i, i0_wb_adr_i,
|
i0_wb_sel_i, i0_wb_we_i, i0_wb_dat_i};
|
i0_wb_sel_i, i0_wb_we_i, i0_wb_dat_i};
|
assign {i0_wb_dat_o, i0_wb_ack_o, i0_wb_err_o} = i0_out;
|
assign {i0_wb_dat_o, i0_wb_ack_o, i0_wb_err_o} = i0_out;
|
|
|
//
|
//
|
// Group WB target 0 i/f inputs and outputs
|
// Group WB target 0 i/f inputs and outputs
|
//
|
//
|
assign {t0_wb_cyc_o, t0_wb_stb_o, t0_wb_cab_o, t0_wb_adr_o,
|
assign {t0_wb_cyc_o, t0_wb_stb_o, t0_wb_adr_o,
|
t0_wb_sel_o, t0_wb_we_o, t0_wb_dat_o} = t0_out;
|
t0_wb_sel_o, t0_wb_we_o, t0_wb_dat_o} = t0_out;
|
assign t0_in = {t0_wb_dat_i, t0_wb_ack_i, t0_wb_err_i};
|
assign t0_in = {t0_wb_dat_i, t0_wb_ack_i, t0_wb_err_i};
|
|
|
//
|
//
|
// Group WB target 1 i/f inputs and outputs
|
// Group WB target 1 i/f inputs and outputs
|
//
|
//
|
assign {t1_wb_cyc_o, t1_wb_stb_o, t1_wb_cab_o, t1_wb_adr_o,
|
assign {t1_wb_cyc_o, t1_wb_stb_o, t1_wb_adr_o,
|
t1_wb_sel_o, t1_wb_we_o, t1_wb_dat_o} = t1_out;
|
t1_wb_sel_o, t1_wb_we_o, t1_wb_dat_o} = t1_out;
|
assign t1_in = {t1_wb_dat_i, t1_wb_ack_i, t1_wb_err_i};
|
assign t1_in = {t1_wb_dat_i, t1_wb_ack_i, t1_wb_err_i};
|
|
|
//
|
//
|
// Group WB target 2 i/f inputs and outputs
|
// Group WB target 2 i/f inputs and outputs
|
//
|
//
|
assign {t2_wb_cyc_o, t2_wb_stb_o, t2_wb_cab_o, t2_wb_adr_o,
|
assign {t2_wb_cyc_o, t2_wb_stb_o, t2_wb_adr_o,
|
t2_wb_sel_o, t2_wb_we_o, t2_wb_dat_o} = t2_out;
|
t2_wb_sel_o, t2_wb_we_o, t2_wb_dat_o} = t2_out;
|
assign t2_in = {t2_wb_dat_i, t2_wb_ack_i, t2_wb_err_i};
|
assign t2_in = {t2_wb_dat_i, t2_wb_ack_i, t2_wb_err_i};
|
|
|
//
|
//
|
// Group WB target 3 i/f inputs and outputs
|
// Group WB target 3 i/f inputs and outputs
|
//
|
//
|
assign {t3_wb_cyc_o, t3_wb_stb_o, t3_wb_cab_o, t3_wb_adr_o,
|
assign {t3_wb_cyc_o, t3_wb_stb_o, t3_wb_adr_o,
|
t3_wb_sel_o, t3_wb_we_o, t3_wb_dat_o} = t3_out;
|
t3_wb_sel_o, t3_wb_we_o, t3_wb_dat_o} = t3_out;
|
assign t3_in = {t3_wb_dat_i, t3_wb_ack_i, t3_wb_err_i};
|
assign t3_in = {t3_wb_dat_i, t3_wb_ack_i, t3_wb_err_i};
|
|
|
//
|
//
|
// Group WB target 4 i/f inputs and outputs
|
// Group WB target 4 i/f inputs and outputs
|
//
|
//
|
assign {t4_wb_cyc_o, t4_wb_stb_o, t4_wb_cab_o, t4_wb_adr_o,
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assign {t4_wb_cyc_o, t4_wb_stb_o, t4_wb_adr_o,
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t4_wb_sel_o, t4_wb_we_o, t4_wb_dat_o} = t4_out;
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t4_wb_sel_o, t4_wb_we_o, t4_wb_dat_o} = t4_out;
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assign t4_in = {t4_wb_dat_i, t4_wb_ack_i, t4_wb_err_i};
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assign t4_in = {t4_wb_dat_i, t4_wb_ack_i, t4_wb_err_i};
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|
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//
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//
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// Group WB target 5 i/f inputs and outputs
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// Group WB target 5 i/f inputs and outputs
|
//
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//
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assign {t5_wb_cyc_o, t5_wb_stb_o, t5_wb_cab_o, t5_wb_adr_o,
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assign {t5_wb_cyc_o, t5_wb_stb_o, t5_wb_adr_o,
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t5_wb_sel_o, t5_wb_we_o, t5_wb_dat_o} = t5_out;
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t5_wb_sel_o, t5_wb_we_o, t5_wb_dat_o} = t5_out;
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assign t5_in = {t5_wb_dat_i, t5_wb_ack_i, t5_wb_err_i};
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assign t5_in = {t5_wb_dat_i, t5_wb_ack_i, t5_wb_err_i};
|
|
|
//
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//
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// Group WB target 6 i/f inputs and outputs
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// Group WB target 6 i/f inputs and outputs
|
//
|
//
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assign {t6_wb_cyc_o, t6_wb_stb_o, t6_wb_cab_o, t6_wb_adr_o,
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assign {t6_wb_cyc_o, t6_wb_stb_o, t6_wb_adr_o,
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t6_wb_sel_o, t6_wb_we_o, t6_wb_dat_o} = t6_out;
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t6_wb_sel_o, t6_wb_we_o, t6_wb_dat_o} = t6_out;
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assign t6_in = {t6_wb_dat_i, t6_wb_ack_i, t6_wb_err_i};
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assign t6_in = {t6_wb_dat_i, t6_wb_ack_i, t6_wb_err_i};
|
|
|
//
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//
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// Group WB target 7 i/f inputs and outputs
|
// Group WB target 7 i/f inputs and outputs
|
//
|
//
|
assign {t7_wb_cyc_o, t7_wb_stb_o, t7_wb_cab_o, t7_wb_adr_o,
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assign {t7_wb_cyc_o, t7_wb_stb_o, t7_wb_adr_o,
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t7_wb_sel_o, t7_wb_we_o, t7_wb_dat_o} = t7_out;
|
t7_wb_sel_o, t7_wb_we_o, t7_wb_dat_o} = t7_out;
|
assign t7_in = {t7_wb_dat_i, t7_wb_ack_i, t7_wb_err_i};
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assign t7_in = {t7_wb_dat_i, t7_wb_ack_i, t7_wb_err_i};
|
|
|
//
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//
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// Assign to WB target i/f outputs
|
// Assign to WB target i/f outputs
|
