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[/] [minsoc/] [branches/] [verilator/] [bench/] [verilog/] [minsoc_bench_core.v] - Diff between revs 109 and 123

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Rev 109 Rev 123
Line 63... Line 63...
 
 
//
//
// Testbench mechanics
// Testbench mechanics
//
//
reg [7:0] program_mem[(1<<(`MEMORY_ADR_WIDTH+2))-1:0];
reg [7:0] program_mem[(1<<(`MEMORY_ADR_WIDTH+2))-1:0];
integer initialize, final, ptr;
integer initialize, firmware_size, ptr;
reg [8*64:0] file_name;
reg [8*64:0] file_name;
reg load_file;
reg load_file;
 
 
initial begin
initial begin
    reset = ~RESET_LEVEL;
    reset = ~RESET_LEVEL;
Line 108... Line 108...
                        $display("ERROR: please specify an input file to start.");
                        $display("ERROR: please specify an input file to start.");
                        $finish;
                        $finish;
                end
                end
                $readmemh(file_name, program_mem);
                $readmemh(file_name, program_mem);
                // First word comprehends size of program
                // First word comprehends size of program
                final = { program_mem[0] , program_mem[1] , program_mem[2] , program_mem[3] };
                firmware_size = { program_mem[0] , program_mem[1] , program_mem[2] , program_mem[3] };
        end
        end
 
 
`ifdef INITIALIZE_MEMORY_MODEL
`ifdef INITIALIZE_MEMORY_MODEL
        // Initialize memory with firmware
        // Initialize memory with firmware
        initialize = 0;
        initialize = 0;
        while ( initialize < final ) begin
        while ( initialize < firmware_size ) begin
                minsoc_top_0.onchip_ram_top.block_ram_3.mem[initialize/4] = program_mem[initialize];
                minsoc_top_0.onchip_ram_top.block_ram_3.mem[initialize/4] = program_mem[initialize];
                minsoc_top_0.onchip_ram_top.block_ram_2.mem[initialize/4] = program_mem[initialize+1];
                minsoc_top_0.onchip_ram_top.block_ram_2.mem[initialize/4] = program_mem[initialize+1];
                minsoc_top_0.onchip_ram_top.block_ram_1.mem[initialize/4] = program_mem[initialize+2];
                minsoc_top_0.onchip_ram_top.block_ram_1.mem[initialize/4] = program_mem[initialize+2];
                minsoc_top_0.onchip_ram_top.block_ram_0.mem[initialize/4] = program_mem[initialize+3];
                minsoc_top_0.onchip_ram_top.block_ram_0.mem[initialize/4] = program_mem[initialize+3];
        initialize = initialize + 4;
        initialize = initialize + 4;
        end
        end
        $display("Memory model initialized with firmware:");
        $display("Memory model initialized with firmware:");
        $display("%s", file_name);
        $display("%s", file_name);
        $display("%d Bytes loaded from %d ...", initialize , final);
        $display("%d Bytes loaded from %d ...", initialize , firmware_size);
`endif
`endif
 
 
    // Reset controller
    // Reset controller
    repeat (2) @ (negedge clock);
    repeat (2) @ (negedge clock);
    reset = RESET_LEVEL;
    reset = RESET_LEVEL;
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        send_spi(program_mem[ptr]);
        send_spi(program_mem[ptr]);
        send_spi(program_mem[ptr]);
        send_spi(program_mem[ptr]);
        send_spi(program_mem[ptr]);
        send_spi(program_mem[ptr]);
        send_spi(program_mem[ptr]);
        send_spi(program_mem[ptr]);
        //~read dummy
        //~read dummy
        while ( ptr < final ) begin
        while ( ptr < firmware_size ) begin
                send_spi(program_mem[ptr]);
                send_spi(program_mem[ptr]);
                ptr = ptr + 1;
                ptr = ptr + 1;
        end
        end
        $display("Memory start-up completed...");
        $display("Memory start-up completed...");
        $display("Loaded firmware:");
        $display("Loaded firmware:");

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