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[/] [minsoc/] [branches/] [verilator/] [bench/] [verilog/] [minsoc_bench_core.v] - Diff between revs 125 and 126

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Rev 125 Rev 126
Line 172... Line 172...
        begin
        begin
`ifdef UART
`ifdef UART
 
 
`ifdef ETHERNET
`ifdef ETHERNET
`ifdef TEST_ETHERNET
`ifdef TEST_ETHERNET
            $display("Testing Ethernet firmware, this takes long (~30 min. @ 2.53 GHz dual-core)...");
            $display("Testing Ethernet firmware, this takes long (~15 min. @ 2.53 GHz dual-core)...");
            $display("Ethernet firmware encloses UART firmware, testing UART firmware first...");
            $display("Ethernet firmware encloses UART firmware, testing UART firmware first...");
            test_uart();
            test_uart();
            test_eth();
            test_eth();
            $display("Stopping simulation.");
            $display("Stopping simulation.");
            $finish;
            $finish;

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