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ROOT = /home/rfajardo/ongoing/or1k/risc_raul
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MINSOC = ../
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MINSOC = $(ROOT)/minsoc
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MINSOC_DEFINES = ${MINSOC}/backend
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MINSOC_RTL = $(MINSOC)/rtl/verilog
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MINSOC_RTL = ${MINSOC}/rtl/verilog
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MINSOC_STARTUP_RTL = $(MINSOC_RTL)/minsoc_startup
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MINSOC_STARTUP_RTL = ${MINSOC_RTL}/minsoc_startup
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UART_RTL = $(MINSOC_RTL)/uart16550/rtl/verilog
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UART_RTL = ${MINSOC_RTL}/uart16550/rtl/verilog
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ADV_DEBUG_ROOT = $(MINSOC_RTL)/adv_debug_sys/Hardware
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ADV_DEBUG_ROOT = ${MINSOC_RTL}/adv_debug_sys/Hardware
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DEBUG_RTL = $(ADV_DEBUG_ROOT)/adv_dbg_if/rtl/verilog
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DEBUG_RTL = ${ADV_DEBUG_ROOT}/adv_dbg_if/rtl/verilog
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OR1200_RTL = $(MINSOC_RTL)/or1200/rtl/verilog
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OR1200_RTL = ${MINSOC_RTL}/or1200/rtl/verilog
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ETH_RTL = $(MINSOC_RTL)/ethmac/rtl/verilog
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ETH_RTL = ${MINSOC_RTL}/ethmac/rtl/verilog
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help:
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help:
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@echo " all: Synthesize and implement the SoC, then generate a bit stream"
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@echo " all: Synthesize and implement the SoC, then generate a bit stream"
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@echo ""
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@echo " soc: Synthesize the SoC"
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@echo " soc: Synthesize the SoC"
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@echo " translate: Convert the SoC's ngc file to an ngd file for mapping"
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@echo " translate: Convert the SoC's ngc file to an ngd file for mapping"
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@echo " map: Express the SoC netlist in the target hardware"
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@echo " map: Express the SoC netlist in the target hardware"
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@echo " par: Place the target hardware, then route the wires"
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@echo " par: Place the target hardware, then route the wires"
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@echo " bitgen: Generate a programming file for the target FPGA"
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@echo " bitgen: Generate a programming file for the target FPGA"
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@echo " clean: Delete all superfluous files generated by Xilinx tools"
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@echo ""
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@echo " distclean: Delete all generated files"
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@echo " modules: Synthesize OR1200 processor, debug interface, UART and Ethernet controllers"
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@echo " or1200: Synthesize the OR1200 processor"
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@echo " or1200: Synthesize the OR1200 processor"
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@echo " debug: Synthesize the debug interface"
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@echo " debug: Synthesize the debug interface"
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@echo " uart: Synthesize the UART"
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@echo " uart: Synthesize the UART"
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@echo " eth: Synthesize the ethernet controller"
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@echo " eth: Synthesize the Ethernet controller"
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@echo " startup: Synthesize the modules to automatically start-up the firmware on power on"
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@echo ""
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@echo " clean: Delete all superfluous files generated by Xilinx tools"
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@echo " distclean: Delete all generated files"
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all: minsoc_top.ngc minsoc.ngd minsoc.ncd minsoc_par.ncd minsoc.bit
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all: minsoc.bit
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soc: minsoc_top.ngc
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soc: minsoc_top.ngc
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translate: minsoc.ngd
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translate: minsoc.ngd
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map: minsoc.ncd
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map: minsoc.ncd
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par: minsoc_par.ncd
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par: minsoc_par.ncd
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bitgen: minsoc.bit
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bitgen: minsoc.bit
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modules: or1200 debug uart eth
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MODULES = or1200_top.ngc adbg_top.ngc uart_top.ngc eth_top.ngc
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distclean:
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prepare:
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rm -rf _xmsgs xst *.{ngc,ncd,ngd,bit,xst,xrpt,srp,lso,log}
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rm -rf xst
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mkdir xst
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clean:
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clean:
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rm -rf _xmsgs xst *.{xst,xrpt,srp,lso,log}
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rm -rf *.xst *.xrpt *.srp *.lso *.log *.bld *.lst *.twr *.ise *.map *.mrp *.ngm *.pcf *.psr *.xml *.pad *.par *.ptwx *.bgn *.unroutes *.xpi minsoc_par_pad* *.xwbt
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rm -rf _xmsgs xst xlnx_auto_0_xdb
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distclean:
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rm -rf *.ngc *.ncd *.ngd *.bit
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make clean
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minsoc_top.ngc: $(MINSOC_RTL)/*.v buildSupport/*.xst buildSupport/*.prj #uart_top.ngc adbg_top.ngc xilinx_internal_jtag.ngc or1200_top.ngc
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minsoc_top.ngc: ${MINSOC_RTL}/*.v ${MINSOC_DEFINES}/minsoc_defines.v buildSupport/minsoc_top.xst buildSupport/minsoc_top.prj
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mkdir xst
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make prepare
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xst -ifn "buildSupport/minsoc_top.xst"
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xst -ifn "buildSupport/minsoc_top.xst"
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rm -f minsoc_top_xst.xrpt
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make clean
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rm -f minsoc_top.srp
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rm -f minsoc_top.lso
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rm -rf _xmsgs
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rm -rf xst
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startup: minsoc_startup_top.ngc
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minsoc_startup_top.ngc: $(MINSOC_STARTUP_RTL)/*.v buildSupport/minsoc_startup_top.xst buildSupport/minsoc_startup_top.prj
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mkdir xst
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xst -ifn "buildSupport/minsoc_startup_top.xst"
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rm -f minsoc_startup_top_xst.xrpt
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rm -f minsoc_startup_top.srp
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rm -f minsoc_startup_top.lso
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rm -rf _xmsgs
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rm -rf xst
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uart: uart_top.ngc
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uart: uart_top.ngc
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uart_top.ngc: $(UART_RTL)/*.v buildSupport/uart_top.xst buildSupport/uart_top.prj
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uart_top.ngc: ${UART_RTL}/*.v buildSupport/uart_top.xst buildSupport/uart_top.prj
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mkdir xst
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make prepare
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xst -ifn "buildSupport/uart_top.xst"
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xst -ifn "buildSupport/uart_top.xst"
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rm -f uart_top_xst.xrpt
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make clean
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rm -f uart_top.srp
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rm -f uart_top.lso
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rm -rf _xmsgs
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rm -rf xst
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eth: eth_top.ngc
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eth: eth_top.ngc
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eth_top.ngc: $(ETH_RTL)/*.v buildSupport/eth_top.xst buildSupport/eth_top.prj
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eth_top.ngc: ${ETH_RTL}/*.v buildSupport/eth_top.xst buildSupport/eth_top.prj
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mkdir xst
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make prepare
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xst -ifn "buildSupport/eth_top.xst"
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xst -ifn "buildSupport/eth_top.xst"
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rm -f eth_top_xst.xrpt
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make clean
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rm -f eth_top.srp
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rm -f eth_top.lso
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rm -rf _xmsgs
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rm -rf xst
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debug: adbg_top.ngc
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debug: adbg_top.ngc
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adbg_top.ngc: $(DEBUG_RTL)/*.v buildSupport/adbg_top.xst buildSupport/adbg_top.prj
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adbg_top.ngc: ${DEBUG_RTL}/*.v buildSupport/adbg_top.xst buildSupport/adbg_top.prj
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mkdir xst
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make prepare
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xst -ifn "buildSupport/adbg_top.xst"
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xst -ifn "buildSupport/adbg_top.xst"
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rm -f adbg_top_xst.xrpt
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make clean
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rm -f adbg_top.srp
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rm -f adbg_top.lso
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rm -rf _xmsgs
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rm -rf xst
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or1200: or1200_top.ngc
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or1200: or1200_top.ngc
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or1200_top.ngc: $(OR1200_RTL)/*.v buildSupport/or1200_top.xst buildSupport/or1200_top.prj
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or1200_top.ngc: ${OR1200_RTL}/*.v buildSupport/or1200_top.xst buildSupport/or1200_top.prj
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mkdir xst
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make prepare
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xst -ifn "buildSupport/or1200_top.xst"
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xst -ifn "buildSupport/or1200_top.xst"
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rm -f or1200_top_xst.xrpt
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make clean
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rm -f or1200_top.srp
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rm -f or1200_top.lso
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rm -rf _xmsgs
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rm -rf xst
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minsoc.ngd: $(MINSOC)/backend/ml509.ucf minsoc_top.ngc
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minsoc.ngd: ${MINSOC}/backend/CONSTRAINT_FILE minsoc_top.ngc $(MODULES)
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ngdbuild -p xc3sd1800a-4-fg676 -uc $(MINSOC)/backend/spartan3a_dsp_kit.ucf -aul minsoc_top.ngc minsoc.ngd
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ngdbuild -p DEVICE_PART -uc ${MINSOC}/backend/CONSTRAINT_FILE -aul minsoc_top.ngc minsoc.ngd
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rm -rf netlist.lst
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make clean
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rm -rf minsoc.bld
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rm -rf minsoc*.xrpt
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rm -rf xlnx_auto_0_xdb
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rm -rf _xmsgs
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minsoc.ncd : minsoc.ngd
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minsoc.ncd : minsoc.ngd
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map -bp -timing -cm speed -equivalent_register_removal on -logic_opt on -ol high -power off -register_duplication on -retiming on -w -xe n minsoc.ngd
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map -bp -timing -cm speed -equivalent_register_removal on -logic_opt on -ol high -power off -register_duplication on -retiming on -w -xe n minsoc.ngd
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rm -rf minsoc.map
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make clean
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rm -rf minsoc.mrp
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rm -rf minsoc.ngm
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rm -rf minsoc.pcf
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rm -rf minsoc.psr
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rm -rf minsoc*.xml
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rm -rf minsoc_top*.xrpt
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rm -rf _xmsgs
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minsoc_par.ncd: minsoc.ncd
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minsoc_par.ncd: minsoc.ncd
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par -ol high -w -xe n minsoc.ncd minsoc_par.ncd
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par -ol high -w -xe n minsoc.ncd minsoc_par.ncd
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rm -rf minsoc_par.pad
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make clean
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rm -rf minsoc_par.par
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rm -rf minsoc_par.ptwx
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rm -rf minsoc_par.unroutes
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rm -rf minsoc_par.xpi
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rm -rf minsoc_par_pad*
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rm -rf minsoc_top*.xrpt
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rm -rf _xmsgs
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minsoc.bit: minsoc_par.ncd
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minsoc.bit: minsoc_par.ncd
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bitgen -d -w minsoc_par.ncd minsoc.bit
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bitgen -d -w minsoc_par.ncd minsoc.bit
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rm -rf minsoc.bgn
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make clean
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rm -rf *.xwbt
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rm -rf *.xml
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rm -rf *.log
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rm -rf _xmsgs
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make clean
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