Line 27... |
Line 27... |
char tx_buff[UART_TX_BUFF_LEN];
|
char tx_buff[UART_TX_BUFF_LEN];
|
volatile int tx_level, rx_level;
|
volatile int tx_level, rx_level;
|
|
|
void uart_init(void)
|
void uart_init(void)
|
{
|
{
|
int devisor;
|
int divisor;
|
|
|
/* Reset receiver and transmiter */
|
/* Reset receiver and transmiter */
|
/* Set RX interrupt for each byte */
|
/* Set RX interrupt for each byte */
|
REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1;
|
REG8(UART_BASE + UART_FCR) = UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | UART_FCR_TRIGGER_1;
|
|
|
/* Enable RX interrupt */
|
/* Enable RX interrupt */
|
REG8(UART_BASE + UART_IER) = 0x01;
|
REG8(UART_BASE + UART_IER) = UART_IER_RDI | UART_IER_THRI;
|
|
|
/* Set 8 bit char, 1 stop bit, no parity */
|
/* Set 8 bit char, 1 stop bit, no parity */
|
REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);
|
REG8(UART_BASE + UART_LCR) = UART_LCR_WLEN8 & ~(UART_LCR_STOP | UART_LCR_PARITY);
|
|
|
/* Set baud rate */
|
/* Set baud rate */
|
devisor = IN_CLK/(16 * UART_BAUD_RATE);
|
divisor = IN_CLK/(16 * UART_BAUD_RATE);
|
REG8(UART_BASE + UART_LCR) |= UART_LCR_DLAB;
|
REG8(UART_BASE + UART_LCR) |= UART_LCR_DLAB;
|
REG8(UART_BASE + UART_DLL) = devisor & 0x000000ff;
|
REG8(UART_BASE + UART_DLL) = divisor & 0x000000ff;
|
REG8(UART_BASE + UART_DLM) = (devisor >> 8) & 0x000000ff;
|
REG8(UART_BASE + UART_DLM) = (divisor >> 8) & 0x000000ff;
|
REG8(UART_BASE + UART_LCR) &= ~(UART_LCR_DLAB);
|
REG8(UART_BASE + UART_LCR) &= ~(UART_LCR_DLAB);
|
|
|
return;
|
return;
|
}
|
}
|
|
|