URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
[/] [minsoc/] [trunk/] [utils/] [setup/] [configure.sh] - Diff between revs 142 and 158
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cecho "\nConfiguring MinSoC"
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cecho "\nConfiguring MinSoC"
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execcmd "cd ${DIR_TO_INSTALL}/minsoc/backend/std"
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execcmd "cd ${DIR_TO_INSTALL}/minsoc/backend/std"
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execcmd "Configuring MinSoC as standard board (simulatable but not synthesizable)" "./configure"
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execcmd "Configuring MinSoC as standard board (simulatable but not synthesizable)" "./configure"
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execcmd "cd ${DIR_TO_INSTALL}"
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execcmd "cd ${DIR_TO_INSTALL}"
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#Configuring Advanced Debug System to work with MinSoC
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cecho "\nConfiguring Advanced Debug System to work with MinSoC"
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execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Hardware/adv_dbg_if/rtl/verilog"
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execcmd "Turning off Advanced Debug System's JSP" "sed 's%\`define DBG_JSP_SUPPORTED%//\`define DBG_JSP_SUPPORTED%' adbg_defines.v > TMPFILE && mv TMPFILE adbg_defines.v"
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#Compiling and moving adv_jtag_bridge debug modules for simulation
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#Compiling and moving adv_jtag_bridge debug modules for simulation
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execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/icarus"
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execcmd "cd ${DIR_TO_INSTALL}/minsoc/rtl/verilog/adv_debug_sys/Software/adv_jtag_bridge/sim_lib/icarus"
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execcmd "Compiling VPI interface to connect GDB with simulation" "make"
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execcmd "Compiling VPI interface to connect GDB with simulation" "make"
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execcmd "cp jp-io-vpi.vpi ${DIR_TO_INSTALL}/minsoc/bench/verilog/vpi"
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execcmd "cp jp-io-vpi.vpi ${DIR_TO_INSTALL}/minsoc/bench/verilog/vpi"
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