URL
https://opencores.org/ocsvn/mips32r1/mips32r1/trunk
Show entire file |
Details |
Blame |
View Log
Rev 2 |
Rev 3 |
Line 52... |
Line 52... |
|
|
// Combinatorial Read. Register 0 is all 0s.
|
// Combinatorial Read. Register 0 is all 0s.
|
assign ReadData1 = (ReadReg1 == 0) ? 32'h00000000 : registers[ReadReg1];
|
assign ReadData1 = (ReadReg1 == 0) ? 32'h00000000 : registers[ReadReg1];
|
assign ReadData2 = (ReadReg2 == 0) ? 32'h00000000 : registers[ReadReg2];
|
assign ReadData2 = (ReadReg2 == 0) ? 32'h00000000 : registers[ReadReg2];
|
|
|
|
|
endmodule
|
endmodule
|
|
|
No newline at end of file
|
No newline at end of file
|
|
|
No newline at end of file
|
No newline at end of file
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.