OpenCores
URL https://opencores.org/ocsvn/mips32r1/mips32r1/trunk

Subversion Repositories mips32r1

[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] [HOWTO] - Diff between revs 4 and 5

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 4 Rev 5
Line 1... Line 1...
MIPS32-R1 SoC HOWTO
MIPS32-R1 SoC HOWTO
-------------------
-------------------
 
 
This document is a step-by-step procedure for building the MIPS32 hardware
This document is a step-by-step procedure for building the MIPS32 hardware
and software and running it on the XUPV5-LX110T FPGA development board. With
and software and running it on the XUPV5-LX110T FPGA development board. With
minimal changes, other hardware platforms may be used as well (see XXX)
minimal changes, other hardware platforms may be used as well (see FAQ).
 
 
Procedure
Procedure
---------
---------
 
 
    1. Build the software toolchain. Instructions for doing this are located
    1. Build the software toolchain. Instructions for doing this are located

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.