OpenCores
URL https://opencores.org/ocsvn/mips32r1/mips32r1/trunk

Subversion Repositories mips32r1

[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] [MIPS32-Pipelined-Hw/] [src/] [MIPS32/] [Processor.v] - Diff between revs 7 and 9

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 7 Rev 9
Line 231... Line 231... 
        .EX_Rs               (EX_Rs),
 
        .EX_Rs               (EX_Rs),
 
        .EX_Rt               (EX_Rt),
 
        .EX_Rt               (EX_Rt),
 
        .EX_RtRd             (EX_RtRd),
 
        .EX_RtRd             (EX_RtRd),
 
        .MEM_RtRd            (M_RtRd),
 
        .MEM_RtRd            (M_RtRd),
 
        .WB_RtRd             (WB_RtRd),
 
        .WB_RtRd             (WB_RtRd),
 
        .ID_Link             (ID_Link),
 
 
 
        .EX_Link             (EX_Link),
 
        .EX_Link             (EX_Link),
 
        .EX_RegWrite         (EX_RegWrite),
 
        .EX_RegWrite         (EX_RegWrite),
 
        .MEM_RegWrite        (M_RegWrite),
 
        .MEM_RegWrite        (M_RegWrite),
 
        .WB_RegWrite         (WB_RegWrite),
 
        .WB_RegWrite         (WB_RegWrite),
 
        .MEM_MemRead         (M_MemRead),
 
        .MEM_MemRead         (M_MemRead),

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.