URL https://opencores.org/ocsvn/mips32r1/mips32r1/trunk

Subversion Repositories mips32r1

[/] [mips32r1/] [trunk/] [Hardware/] [XUPV5-LX110T_SoC/] [MIPS32-Pipelined-Hw/] [src/] [UART/] [uart_rx.v] - Diff between revs 2 and 3

Rev 2	Rev 3
Line 92...	Line 92...
`always @(posedge clock) RxD_data <= (capture) ? {RxD_bit, RxD_data[7:1]} : RxD_data[7:0];`	`always @(posedge clock) RxD_data <= (capture) ? {RxD_bit, RxD_data[7:1]} : RxD_data[7:0];`
`assign data_ready = (uart_tick_16x & next_bit & (state==STOP));`	`assign data_ready = (uart_tick_16x & next_bit & (state==STOP));`

`endmodule`	`endmodule`

`No newline at end of file`	`No newline at end of file`

`No newline at end of file`	`No newline at end of file`