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[/] [mips789/] [branches/] [avendor/] [rtl/] [verilog/] [mips_top.v] - Diff between revs 34 and 35

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Rev 34 Rev 35
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 *    Email:mcupro@opencores.org  or mcupro@163.com               *
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`include "mips789_defs.v"
`include "mips789_defs.v"
//`include "../../../rtl/verilog/mips789_defs.v"
 
module mips_top (
module mips_top (
 input clk,
 input clk,
 input rst,
 input rst,
 input ser_rxd,
 input ser_rxd,
 output ser_txd,
 output ser_txd,
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        .key1(key1),
        .key1(key1),
        .key2(key2)
        .key2(key2)
);
);
 
 
endmodule
endmodule
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