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/******************************************************************
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* *
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* Author: Liwei *
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* *
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* This file is part of the "mips789" project. *
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* Downloaded from: *
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* http://www.opencores.org/pdownloads.cgi/list/mips789 *
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* *
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* If you encountered any problem, please contact me via, *
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* Email:mcupro@opencores.org or mcupro@163.com *
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* *
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******************************************************************/
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#include "stdio.h"
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#include "stdio.h"
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#include "stdlib.h"
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#include "stdlib.h"
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#define MAX_LEN (1024*2)
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int print_module(FILE * ft){
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if (ft==NULL)return 0;
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fprintf(ft,"//This file is only used for simulation.\nmodule sim_mem_array \n");
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fprintf(ft," ( \n");
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fprintf(ft," input clk, \n");
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fprintf(ft," input [31:0] pc_i, \n");
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fprintf(ft," output [31:0] ins_o, \n");
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fprintf(ft," input [3:0] wren, \n");
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fprintf(ft," input [31:0]din, \n");
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fprintf(ft," input [31:0]data_addr_i, \n");
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fprintf(ft," output [31:0]dout \n");
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fprintf(ft," ); \n\n");
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fprintf(ft," wire [29:0] data_addr,pc; \n");
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fprintf(ft," wire [31:0]dout_w; \n");
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fprintf(ft," assign dout = dout_w; \n");
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fprintf(ft," assign data_addr=data_addr_i[31:2]; \n");
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fprintf(ft," assign pc= pc_i[31:2]; \n\n");
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fprintf(ft," sim_syn_ram3 ram3 ( \n");
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fprintf(ft," .data(din[31:24]), \n");
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fprintf(ft," .wraddress(data_addr), \n");
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fprintf(ft," .rdaddress_a(pc), \n");
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fprintf(ft," .rdaddress_b(data_addr), \n");
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fprintf(ft," .wren(wren[3]), \n");
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fprintf(ft," .clock(clk), \n");
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fprintf(ft," .qa(ins_o[31:24]), \n");
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fprintf(ft," .qb(dout_w[31:24]) \n");
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fprintf(ft," ); \n");
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fprintf(ft," sim_syn_ram2 ram2( \n");
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fprintf(ft," .data(din[23:16]), \n");
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fprintf(ft," .wraddress(data_addr), \n");
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fprintf(ft," .rdaddress_a(pc), \n");
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fprintf(ft," .rdaddress_b(data_addr), \n");
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fprintf(ft," .wren(wren[2]), \n");
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fprintf(ft," .clock(clk), \n");
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fprintf(ft," .qa(ins_o[23:16]), \n");
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fprintf(ft," .qb(dout_w[23:16]) \n");
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fprintf(ft," ); \n");
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fprintf(ft," sim_syn_ram1 ram1( \n");
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fprintf(ft," .data(din[15:8]), \n");
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fprintf(ft," .wraddress(data_addr), \n");
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fprintf(ft," .rdaddress_a(pc), \n");
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fprintf(ft," .rdaddress_b(data_addr), \n");
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fprintf(ft," .wren(wren[1]), \n");
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fprintf(ft," .clock(clk), \n");
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fprintf(ft," .qa(ins_o[15:8]), \n");
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fprintf(ft," .qb(dout_w[15:8]) \n");
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fprintf(ft," ); \n");
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fprintf(ft," sim_syn_ram0 ram0( \n");
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fprintf(ft," .data(din[7:0]), \n");
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fprintf(ft," .wraddress(data_addr), \n");
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fprintf(ft," .rdaddress_a(pc), \n");
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fprintf(ft," .rdaddress_b(data_addr), \n");
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fprintf(ft," .wren(wren[0]), \n");
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fprintf(ft," .clock(clk), \n");
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fprintf(ft," .qa(ins_o[7:0]), \n");
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fprintf(ft," .qb(dout_w[7:0]) \n");
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fprintf(ft," ); \n");
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fprintf(ft,"endmodule \n\n\n");
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return 1;
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}
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/*Liwei 2007-8-29*/
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/*Liwei 2007-8-29*/
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char HEX[]="0123456789ABCDEF" ;
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char HEX[]="0123456789ABCDEF" ;
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char hex[]="0123456789abcdef" ;
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char hex[]="0123456789abcdef" ;
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unsigned char hex2byte( char hex_char)
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unsigned char hex2byte( char hex_char)
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{
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{
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unsigned char i ;
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unsigned char i ;
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for(i=0;i<16;++i)if(HEX[i]==hex_char)return i ;
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for(i=0;i<16;++i)if(HEX[i]==hex_char)return i ;
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for(i=0;i<16;++i)if(hex[i]==hex_char)return i ;
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for(i=0;i<16;++i)if(hex[i]==hex_char)return i ;
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unsigned int par2u32(char*par)
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unsigned int par2u32(char*par)
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{
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{
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unsigned int i,ret=0 ;
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unsigned int i,ret=0 ;
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if(par==NULL)return ;
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if(par==NULL)return ;
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if((0==strncmp(par,"0x",2))||(0==strncmp(par,"0X",2)))
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if((0==strncmp(par,"0x",2))||(0==strncmp(par,"0X",2)))
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for(i=2;;++i) {if(par[i]=='\0')return ret ; ret=ret*16+hex2byte(par[i]);}
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for(i=2;;++i) {if(par[i]=='\0')return ret ;if(par[i]==' ')return ret ; ret=ret*16+hex2byte(par[i]);}
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else
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else
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for(i=0;;++i) {if(par[i]=='\0')return ret ; ret=ret*10+hex2byte(par[i]);}
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for(i=0;;++i) {if(par[i]=='\0')return ret ;if(par[i]==' ')return ret ; ret=ret*10+hex2byte(par[i]);}
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return 0 ;
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return 0 ;
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}
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}
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main(int argc,char*argv[])
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main(int argc,char*argv[])
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{
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{
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FILE*ff=fopen("code.txt","r");
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FILE*ff=fopen("code.txt","r");
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FILE*ft=fopen("sim_ram.v","w");
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FILE*ft=fopen("sim_ram.v","w");
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if(NULL!=argv[1])
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if(NULL!=argv[1])
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base=par2u32(argv[1])/4;
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base=par2u32(argv[1])/4;
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print_module(ft);
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for(j=0;j<4;++j)
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for(j=0;j<4;++j)
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{
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{
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cntr=-10 ;
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cntr=-10 ;
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fprintf(ft,"module sim_syn_ram%d(\n",j);
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fprintf(ft,"module sim_syn_ram%d(\n",j);
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fprintf(ft," data,\n");
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fprintf(ft," input [7:0] data,\n");
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fprintf(ft," wraddress,\n");
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fprintf(ft," input [10:0] wraddress,\n");
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fprintf(ft," rdaddress_a,\n");
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fprintf(ft," input [10:0] rdaddress_a,\n");
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fprintf(ft," rdaddress_b,\n");
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fprintf(ft," input [10:0] rdaddress_b,\n");
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fprintf(ft," wren,\n");
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fprintf(ft," input wren,\n");
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fprintf(ft," clock,\n");
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fprintf(ft," input clock,\n");
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fprintf(ft," qa,\n");
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fprintf(ft," output [7:0] qa,\n");
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fprintf(ft," qb);\n\n");
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fprintf(ft," output [7:0] qb\n");
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fprintf(ft," input [7:0] data;\n");
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fprintf(ft," );\n\n");
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fprintf(ft," input [10:0] wraddress;\n");
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fprintf(ft," input [10:0] rdaddress_a;\n");
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fprintf(ft," input [10:0] rdaddress_b;\n");
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fprintf(ft," input wren;\n");
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fprintf(ft," reg [7:0] r_data;\n");
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fprintf(ft," reg [7:0] r_data;\n");
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fprintf(ft," reg [10:0] r_wraddress;\n");
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fprintf(ft," reg [10:0] r_wraddress;\n");
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fprintf(ft," reg [10:0] r_rdaddress_a;\n");
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fprintf(ft," reg [10:0] r_rdaddress_a;\n");
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fprintf(ft," reg [10:0] r_rdaddress_b;\n");
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fprintf(ft," reg [10:0] r_rdaddress_b;\n");
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fprintf(ft," reg r_wren;\n");
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fprintf(ft," reg r_wren;\n");
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fprintf(ft," input clock;\n");
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fprintf(ft," output [7:0] qa;\n");
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fprintf(ft," output [7:0] qb;\n");
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fprintf(ft," reg [7:0] mem_bank [0:2047] ;\n");
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fprintf(ft," reg [7:0] mem_bank [0:2047] ;\n");
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if(base!=0)
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if(base!=0)
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fprintf(ft," integer i;\n initial begin\n for(i=0;i<%d;i=1+i)\n mem_bank[i] = 'h00;\n ",base);
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fprintf(ft," \ninteger i;\n initial begin\n for(i=0;i<%d;i=1+i)\n mem_bank[i] = 'h00;\n ",base);
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else
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else
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fprintf(ft," initial begin \n ");
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fprintf(ft," \ninitial begin \n ");
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rewind(ff);
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rewind(ff);
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cntr=-10 ;
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cntr=-10 ;
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i=-1 ;
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i=-1 ;
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Line 209... |
fprintf(ft," r_wraddress<=wraddress;\n");
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fprintf(ft," r_wraddress<=wraddress;\n");
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fprintf(ft," r_rdaddress_a<=rdaddress_a;\n");
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fprintf(ft," r_rdaddress_a<=rdaddress_a;\n");
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fprintf(ft," r_rdaddress_b<=rdaddress_b;\n");
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fprintf(ft," r_rdaddress_b<=rdaddress_b;\n");
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fprintf(ft," r_wren<=wren;\n");
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fprintf(ft," r_wren<=wren;\n");
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fprintf(ft," end\n");
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fprintf(ft," end\n");
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fprintf(ft," assign qa =mem_bank[r_rdaddress_a];\n");
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fprintf(ft," assign qa =(r_rdaddress_a>%d)?0:mem_bank[r_rdaddress_a];\n",base+i);
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fprintf(ft," assign qb =mem_bank[r_rdaddress_b];\n");
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fprintf(ft," assign qb =(r_rdaddress_b>%d)?0:mem_bank[r_rdaddress_b];\n",base+i);
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fprintf(ft,"endmodule\n\n\n\n");
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fprintf(ft,"endmodule\n\n\n\n");
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}
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}fclose(ft);
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}
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}
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No newline at end of file
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No newline at end of file
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