Line 56... |
Line 56... |
-- ByteStuffer
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-- ByteStuffer
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num_enc_bytes : in std_logic_vector(23 downto 0);
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num_enc_bytes : in std_logic_vector(23 downto 0);
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-- HOST IF
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-- HOST IF
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qwren : in std_logic;
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qwren : in std_logic;
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qwaddr : in std_logic_vector(5 downto 0);
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qwaddr : in std_logic_vector(6 downto 0);
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qwdata : in std_logic_vector(7 downto 0);
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qwdata : in std_logic_vector(7 downto 0);
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image_size_reg : in std_logic_vector(31 downto 0);
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image_size_reg : in std_logic_vector(31 downto 0);
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image_size_reg_wr : in std_logic;
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image_size_reg_wr : in std_logic;
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-- OUT RAM
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-- OUT RAM
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Line 81... |
Line 81... |
constant C_SIZE_Y_L : integer := 26;
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constant C_SIZE_Y_L : integer := 26;
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constant C_SIZE_X_H : integer := 27;
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constant C_SIZE_X_H : integer := 27;
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constant C_SIZE_X_L : integer := 28;
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constant C_SIZE_X_L : integer := 28;
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constant C_EOI : std_logic_vector(15 downto 0) := X"FFD9";
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constant C_EOI : std_logic_vector(15 downto 0) := X"FFD9";
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constant C_QLUM_BASE : integer := 44;
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constant C_QCHR_BASE : integer := 44+69;
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signal hr_data : std_logic_vector(7 downto 0);
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signal hr_data : std_logic_vector(7 downto 0);
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signal hr_waddr : std_logic_vector(8 downto 0);
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signal hr_waddr : std_logic_vector(8 downto 0);
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signal hr_raddr : std_logic_vector(8 downto 0);
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signal hr_raddr : std_logic_vector(8 downto 0);
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Line 178... |
null;
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null;
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end case;
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end case;
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end if;
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end if;
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-- write Quantization table
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-- write Quantization table
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elsif qwren = '1' then
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elsif qwren = '1' then
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hr_waddr <= std_logic_vector( resize(unsigned(qwaddr),hr_waddr'length) +
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-- luminance table select
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to_unsigned(44,hr_waddr'length));
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if qwaddr(6) = '0' then
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hr_waddr <= std_logic_vector
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( resize(unsigned(qwaddr(5 downto 0)),hr_waddr'length) +
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to_unsigned(C_QLUM_BASE,hr_waddr'length));
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else
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-- chrominance table select
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hr_waddr <= std_logic_vector
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( resize(unsigned(qwaddr(5 downto 0)),hr_waddr'length) +
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to_unsigned(C_QCHR_BASE,hr_waddr'length));
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end if;
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hr_we <= '1';
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hr_we <= '1';
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hr_data <= qwdata;
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hr_data <= qwdata;
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end if;
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end if;
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end if;
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end if;
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