| Line 101... |
Line 101... |
signal rd_en_d1 : std_logic;
|
signal rd_en_d1 : std_logic;
|
signal rdaddr : unsigned(31 downto 0);
|
signal rdaddr : unsigned(31 downto 0);
|
signal bf_dval : std_logic;
|
signal bf_dval : std_logic;
|
signal bf_dval_m1 : std_logic;
|
signal bf_dval_m1 : std_logic;
|
signal bf_dval_m2 : std_logic;
|
signal bf_dval_m2 : std_logic;
|
|
signal bf_dval_m3 : std_logic;
|
signal wr_cnt : unsigned(5 downto 0);
|
signal wr_cnt : unsigned(5 downto 0);
|
signal dbuf_data : std_logic_vector(11 downto 0);
|
signal dbuf_data : std_logic_vector(11 downto 0);
|
signal dbuf_q : std_logic_vector(11 downto 0);
|
signal dbuf_q : std_logic_vector(11 downto 0);
|
signal dbuf_we : std_logic;
|
signal dbuf_we : std_logic;
|
signal dbuf_waddr : std_logic_vector(6 downto 0);
|
signal dbuf_waddr : std_logic_vector(6 downto 0);
|
| Line 257... |
Line 258... |
cur_cmp_idx_d7 <= cur_cmp_idx_d6;
|
cur_cmp_idx_d7 <= cur_cmp_idx_d6;
|
cur_cmp_idx_d8 <= cur_cmp_idx_d7;
|
cur_cmp_idx_d8 <= cur_cmp_idx_d7;
|
cur_cmp_idx_d9 <= cur_cmp_idx_d8;
|
cur_cmp_idx_d9 <= cur_cmp_idx_d8;
|
start_int <= '0';
|
start_int <= '0';
|
|
|
bf_dval_m2 <= bf_fifo_rd_s;
|
bf_dval_m3 <= bf_fifo_rd_s;
|
|
bf_dval_m2 <= bf_dval_m3;
|
bf_dval_m1 <= bf_dval_m2;
|
bf_dval_m1 <= bf_dval_m2;
|
bf_dval <= bf_dval_m1;
|
bf_dval <= bf_dval_m1;
|
|
|
fram1_rd_d <= fram1_rd_d(fram1_rd_d'length-2 downto 0) & fram1_rd;
|
fram1_rd_d <= fram1_rd_d(fram1_rd_d'length-2 downto 0) & fram1_rd;
|
|
|
-- SOF or internal self-start
|
-- SOF or internal self-start
|
if (sof = '1' or start_int = '1') then
|
if (sof = '1' or start_int = '1') then
|
input_rd_cnt <= (others => '0');
|
input_rd_cnt <= (others => '0');
|
| Line 303... |
Line 306... |
|
|
bf_fifo_rd_s <= '0';
|
bf_fifo_rd_s <= '0';
|
fram1_rd <= '0';
|
fram1_rd <= '0';
|
-- stall reading from input FIFO and writing to output FIFO
|
-- stall reading from input FIFO and writing to output FIFO
|
-- when output FIFO is almost full
|
-- when output FIFO is almost full
|
if rd_en = '1' and unsigned(fifo1_count) < 256-64 then
|
if rd_en = '1' and unsigned(fifo1_count) < 256-64 and
|
|
(bf_fifo_hf_full = '1' or cur_cmp_idx /= 0) then
|
-- read request goes to BUF_FIFO only for component 0.
|
-- read request goes to BUF_FIFO only for component 0.
|
if cur_cmp_idx = 0 then
|
if cur_cmp_idx = 0 then
|
bf_fifo_rd_s <= '1';
|
bf_fifo_rd_s <= '1';
|
end if;
|
end if;
|
|
|
