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Rev 61 |
Line 38... |
Line 38... |
di : in STD_LOGIC_VECTOR(SIZE_C-1 downto 0);
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di : in STD_LOGIC_VECTOR(SIZE_C-1 downto 0);
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divalid : in STD_LOGIC;
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divalid : in STD_LOGIC;
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qdata : in std_logic_vector(7 downto 0);
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qdata : in std_logic_vector(7 downto 0);
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qwaddr : in std_logic_vector(6 downto 0);
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qwaddr : in std_logic_vector(6 downto 0);
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qwren : in std_logic;
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qwren : in std_logic;
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cmp_idx : in unsigned(1 downto 0);
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cmp_idx : in unsigned(2 downto 0);
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do : out STD_LOGIC_VECTOR(SIZE_C-1 downto 0);
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do : out STD_LOGIC_VECTOR(SIZE_C-1 downto 0);
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dovalid : out STD_LOGIC
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dovalid : out STD_LOGIC
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);
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);
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end quantizer;
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end quantizer;
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Line 113... |
Line 113... |
if clk = '1' and clk'event then
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if clk = '1' and clk'event then
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if rst = '1' then
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if rst = '1' then
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table_select <= '0';
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table_select <= '0';
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else
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else
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-- luminance table select
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-- luminance table select
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if cmp_idx = 0 then
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if cmp_idx < 2 then
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table_select <= '0';
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table_select <= '0';
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-- chrominance table select
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-- chrominance table select
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else
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else
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table_select <= '1';
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table_select <= '1';
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end if;
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end if;
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