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Subversion Repositories mkjpeg

[/] [mkjpeg/] [trunk/] [design/] [rle/] [RLE.VHD] - Diff between revs 40 and 41

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Rev 40	Rev 41
Line 73...	Line 73...

`signal rd_cnt : unsigned(5 downto 0);`	`signal rd_cnt : unsigned(5 downto 0);`
`signal rd_en : std_logic;`	`signal rd_en : std_logic;`

`signal divalid : STD_LOGIC;`	`signal divalid : STD_LOGIC;`
	`signal divalid_en : std_logic;`
`signal zrl_proc : std_logic;`	`signal zrl_proc : std_logic;`
`signal zrl_di : STD_LOGIC_VECTOR(RAMDATA_W-1 downto 0);`	`signal zrl_di : STD_LOGIC_VECTOR(RAMDATA_W-1 downto 0);`
`begin`	`begin`

`size <= STD_LOGIC_VECTOR(size_reg);`	`size <= STD_LOGIC_VECTOR(size_reg);`
Line 101...	Line 102...
`dovalid <= '0';`	`dovalid <= '0';`
`zero_cnt <= (others => '0');`	`zero_cnt <= (others => '0');`
`zrl_proc <= '0';`	`zrl_proc <= '0';`
`rd_en <= '0';`	`rd_en <= '0';`
`rd_cnt <= (others => '0');`	`rd_cnt <= (others => '0');`
	`divalid_en <= '0';`
`elsif clk = '1' and clk'event then`	`elsif clk = '1' and clk'event then`
`dovalid_reg <= '0';`	`dovalid_reg <= '0';`
`runlength_reg <= (others => '0');`	`runlength_reg <= (others => '0');`
`wr_cnt_d1 <= wr_cnt;`	`wr_cnt_d1 <= wr_cnt;`
`runlength <= std_logic_vector(runlength_reg);`	`runlength <= std_logic_vector(runlength_reg);`
Line 112...	Line 114...
`divalid <= rd_en;`	`divalid <= rd_en;`

`if start_pb = '1' then`	`if start_pb = '1' then`
`rd_cnt <= (others => '0');`	`rd_cnt <= (others => '0');`
`rd_en <= '1';`	`rd_en <= '1';`
	`divalid_en <= '1';`
	`end if;`

	`if divalid = '1' and wr_cnt = 63 then`
	`divalid_en <= '0';`
`end if;`	`end if;`

`-- input read enable`	`-- input read enable`
`if rd_en = '1' then`	`if rd_en = '1' then`
`if rd_cnt = 64-1 then`	`if rd_cnt = 64-1 then`
Line 195...	Line 202...
`zero_cnt <= to_unsigned(1,zero_cnt'length);`	`zero_cnt <= to_unsigned(1,zero_cnt'length);`
`else`	`else`
`zero_cnt <= (others => '0');`	`zero_cnt <= (others => '0');`
`end if;`	`end if;`
`dovalid_reg <= '1';`	`dovalid_reg <= '1';`
`divalid <= '1';`	`divalid <= divalid_en;`
`-- continue input handling`	`-- continue input handling`
`zrl_proc <= '0';`	`zrl_proc <= '0';`
`-- zero_cnt > 15`	`-- zero_cnt > 15`
`else`	`else`
`-- generate ZRL`	`-- generate ZRL`

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Subversion Repositories mkjpeg

[/] [mkjpeg/] [trunk/] [design/] [rle/] [RLE.VHD] - Diff between revs 40 and 41