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use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-- user packages/libraries:
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-- user packages/libraries:
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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library work;
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use work.JPEG_PKG.all;
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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----------------------------------- ENTITY ------------------------------------
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----------------------------------- ENTITY ------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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CLK : in std_logic;
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CLK : in std_logic;
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RST : in std_logic;
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RST : in std_logic;
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-- CTRL
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-- CTRL
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start_pb : in std_logic;
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start_pb : in std_logic;
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ready_pb : out std_logic;
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ready_pb : out std_logic;
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zig_sm_settings : in T_SM_SETTINGS;
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-- RLE
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-- RLE
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rle_buf_sel : in std_logic;
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rle_buf_sel : in std_logic;
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rle_rdaddr : in std_logic_vector(5 downto 0);
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rle_rdaddr : in std_logic_vector(5 downto 0);
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rle_data : out std_logic_vector(11 downto 0);
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rle_data : out std_logic_vector(11 downto 0);
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fdct_data : in std_logic_vector(11 downto 0);
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fdct_data : in std_logic_vector(11 downto 0);
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fdct_rden : out std_logic;
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fdct_rden : out std_logic;
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-- HOST
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-- HOST
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qdata : in std_logic_vector(7 downto 0);
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qdata : in std_logic_vector(7 downto 0);
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qaddr : in std_logic_vector(5 downto 0);
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qaddr : in std_logic_vector(6 downto 0);
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qwren : in std_logic
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qwren : in std_logic
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);
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);
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end entity ZZ_TOP;
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end entity ZZ_TOP;
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------------------
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-------------------------------------------------------------------
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-------------------------------------------------------------------
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U_quantizer : entity work.quantizer
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U_quantizer : entity work.quantizer
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generic map
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generic map
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(
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(
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SIZE_C => 12,
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SIZE_C => 12,
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RAMQADDR_W => 6,
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RAMQADDR_W => 7,
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RAMQDATA_W => 8
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RAMQDATA_W => 8
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)
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)
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port map
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port map
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(
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(
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rst => RST,
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rst => RST,
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di => zigzag_dout,
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di => zigzag_dout,
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divalid => zigzag_dovalid,
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divalid => zigzag_dovalid,
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qdata => qdata,
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qdata => qdata,
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qwaddr => qaddr,
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qwaddr => qaddr,
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qwren => qwren,
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qwren => qwren,
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cmp_idx => zig_sm_settings.cmp_idx,
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do => quant_dout,
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do => quant_dout,
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dovalid => quant_dovalid
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dovalid => quant_dovalid
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);
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);
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