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[/] [mlite/] [tags/] [V3_0/] [vhdl/] [mlite_cpu.vhd] - Diff between revs 128 and 132
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Rev 132 |
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Line 72... |
--use mlite_lib.mlite_pack.all;
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--use mlite_lib.mlite_pack.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_unsigned.all;
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use ieee.std_logic_unsigned.all;
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entity mlite_cpu is
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entity mlite_cpu is
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generic(memory_type : string := "GENERIC"; --DUAL_PORT_XILINX_XC4000XLA
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generic(memory_type : string := "DEFAULT"; --DUAL_PORT_XILINX_XC4000XLA
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adder_type : string := "GENERIC"; --AREA_OPTIMIZED
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adder_type : string := "DEFAULT"; --AREA_OPTIMIZED
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mult_type : string := "GENERIC"; --AREA_OPTIMIZED
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mult_type : string := "DEFAULT"; --AREA_OPTIMIZED
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shifter_type : string := "GENERIC"; --AREA_OPTIMIZED
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shifter_type : string := "DEFAULT"; --AREA_OPTIMIZED
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alu_type : string := "GENERIC"; --AREA_OPTIMIZED
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alu_type : string := "DEFAULT"; --AREA_OPTIMIZED
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pipeline_stages : natural := 3;
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pipeline_stages : natural := 3;
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accurate_timing : boolean := true);
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accurate_timing : boolean := true);
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port(clk : in std_logic;
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port(clk : in std_logic;
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reset_in : in std_logic;
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reset_in : in std_logic;
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intr_in : in std_logic;
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intr_in : in std_logic;
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