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Line 15... |
.ent entry
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.ent entry
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entry:
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entry:
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.set noreorder
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.set noreorder
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#These eight instructions must be the first instructions.
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#These eight instructions must be the first instructions.
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#convert.exe will correctly initialize $gp
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#convert.exe will correctly initialize $gp, .sbss_start, .bss_end, $sp
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lui $gp, 0
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lui $gp, 0
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ori $gp, $gp, 0
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ori $gp, $gp, 0 #initialize $gp
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#convert.exe will set $4=.sbss_start $5=.bss_end
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lui $4, 0
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lui $4, 0
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ori $4, $4, 0
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ori $4, $4, 0 #$4 = .sbss_start
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lui $5, 0
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lui $5, 0
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ori $5, $5, 0
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ori $5, $5, 0 #$5 = .bss_end
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lui $sp, 0
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lui $sp, 0
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ori $sp, $sp, 0xfff0 #initialize stack pointer
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ori $sp, $sp, 0xfff0 #initialize stack pointer
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$BSS_CLEAR:
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$BSS_CLEAR:
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sw $0, 0($4)
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sw $0, 0($4)
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slt $3, $4, $5
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slt $3, $4, $5
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bnez $3, $BSS_CLEAR
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bnez $3, $BSS_CLEAR
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addiu $4, $4, 4
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addiu $4, $4, 4
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jal main2
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jal main
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nop
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nop
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$L1:
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$L1:
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j $L1
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j $L1
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.end entry
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###################################################
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#address 0x3c
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#address 0x3c
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.globl interrupt_service_routine
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.ent interrupt_service_routine
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interrupt_service_routine:
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interrupt_service_routine:
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#registers $26 and $27 are reserved for the OS
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.set noreorder
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ori $26, $0, 0xffff
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.set noat
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ori $27, $0, 46
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sb $27, 0($26) #echo out '.'
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#Registers $26 and $27 are reserved for the OS
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#Save all temporary registers
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#normally clear the interrupt source here
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addi $29, $29, -104 #adjust sp
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sw $1, 16($29) #at
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#return and re-enable interrupts
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sw $2, 20($29) #v0
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ori $26, $0, 0x1
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sw $3, 24($29) #v1
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mfc0 $27, $14 #C0_EPC=14
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sw $4, 28($29) #a0
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jr $27
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sw $5, 32($29) #a1
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mtc0 $26, $12 #STATUS=1; enable interrupts
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sw $6, 36($29) #a2
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.set reorder
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sw $7, 40($29) #a3
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.end entry
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sw $8, 44($29) #t0
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sw $9, 48($29) #t1
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sw $10, 52($29) #t2
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sw $11, 56($29) #t3
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sw $12, 60($29) #t4
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sw $13, 64($29) #t5
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sw $14, 68($29) #t6
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sw $15, 72($29) #t7
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sw $24, 76($29) #t8
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sw $25, 80($29) #t9
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sw $31, 84($29) #lr
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mfc0 $26, $14 #C0_EPC=14 (Exception PC)
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addi $26, $26, -4 #Backup one opcode
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sw $26, 88($29) #pc
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mfhi $27
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sw $27, 92($29) #hi
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mflo $27
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sw $27, 96($29) #lo
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lui $5, 0x2000
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lw $4, 0x20($5) #IRQ_STATUS
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lw $6, 0x10($5) #IRQ_MASK
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jal OS_InterruptServiceRoutine
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and $4, $4, $6
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#Restore all temporary registers
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lw $1, 16($29) #at
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lw $2, 20($29) #v0
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lw $3, 24($29) #v1
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lw $4, 28($29) #a0
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lw $5, 32($29) #a1
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lw $6, 36($29) #a2
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lw $7, 40($29) #a3
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lw $8, 44($29) #t0
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lw $9, 48($29) #t1
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lw $10, 52($29) #t2
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lw $11, 56($29) #t3
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lw $12, 60($29) #t4
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lw $13, 64($29) #t5
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lw $14, 68($29) #t6
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lw $15, 72($29) #t7
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lw $24, 76($29) #t8
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lw $25, 80($29) #t9
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lw $31, 84($29) #lr
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lw $26, 88($29) #pc
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lw $27, 92($29) #hi
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mthi $27
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lw $27, 96($29) #lo
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mtlo $27
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addi $29, $29, 104 #adjust sp
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ori $27, $0, 0x1 #re-enable interrupts
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jr $26
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mtc0 $27, $12 #STATUS=1; enable interrupts
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.end interrupt_service_routine
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.set at
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###################################################
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###################################################
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.globl isr_enable
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.globl OS_AsmInterruptEnable
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.ent isr_enable
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.ent OS_AsmInterruptEnable
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isr_enable:
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OS_AsmInterruptEnable:
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.set noreorder
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.set noreorder
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mfc0 $2, $12
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jr $31
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jr $31
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mtc0 $4, $12 #STATUS=1; enable interrupts
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mtc0 $4, $12 #STATUS=1; enable interrupts
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#nop
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.set reorder
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.set reorder
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.end isr_enable
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.end OS_AsmInterruptEnable
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###################################################
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###################################################
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.globl putchar
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.globl OS_AsmInterruptInit
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.ent putchar
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.ent OS_AsmInterruptInit
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putchar:
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OS_AsmInterruptInit:
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.set noreorder
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.set noreorder
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li $5, 0xffff
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#Patch interrupt vector to 0x1000003c
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la $5, OS_AsmPatchValue
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lw $6, 0($5)
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sw $6, 0x3c($0)
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lw $6, 4($5)
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sw $6, 0x40($0)
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lw $6, 8($5)
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sw $6, 0x44($0)
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lw $6, 12($5)
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jr $31
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sw $6, 0x48($0)
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#Uncomment to make each character on a seperate line
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OS_AsmPatchValue:
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#The VHDL simulator buffers the lines
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#Registers $26 and $27 are reserved for the OS
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# sb $4, 0($5)
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#Code to place at address 0x3c
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# ori $4, $0, '\n'
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lui $26, 0x1000
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ori $26, $26, 0x3c
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jr $26
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nop
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jr $31
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sb $4, 0($5)
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.set reorder
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.set reorder
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.end putchar
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.end OS_AsmInterruptInit
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###################################################
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###################################################
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.globl puts
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.globl setjmp
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.ent puts
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.ent setjmp
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puts:
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setjmp:
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.set noreorder
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.set noreorder
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ori $5,$0,0xffff
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sw $16, 0($4) #s0
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PUTS1:
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sw $17, 4($4) #s1
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lb $6, 0($4)
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sw $18, 8($4) #s2
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beqz $6, PUTS2
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sw $19, 12($4) #s3
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addiu $4, $4, 1
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sw $20, 16($4) #s4
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b PUTS1
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sw $21, 20($4) #s5
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sb $6, 0($5)
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sw $22, 24($4) #s6
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PUTS2:
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sw $23, 28($4) #s7
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sw $30, 32($4) #s8
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sw $28, 36($4) #gp
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sw $29, 40($4) #sp
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sw $31, 44($4) #lr
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jr $31
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jr $31
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ori $2, $0, 0
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ori $2, $0, 0
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.set reorder
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.set reorder
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.end puts
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.end setjmp
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###################################################
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.globl longjmp
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.ent longjmp
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longjmp:
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.set noreorder
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lw $16, 0($4) #s0
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lw $17, 4($4) #s1
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lw $18, 8($4) #s2
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lw $19, 12($4) #s3
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lw $20, 16($4) #s4
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lw $21, 20($4) #s5
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lw $22, 24($4) #s6
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lw $23, 28($4) #s7
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lw $30, 32($4) #s8
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lw $28, 36($4) #gp
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lw $29, 40($4) #sp
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lw $31, 44($4) #lr
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jr $31
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ori $2, $5, 0
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.set reorder
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.end longjmp
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###################################################
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.globl OS_AsmMult
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.ent OS_AsmMult
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OS_AsmMult:
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.set noreorder
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multu $4, $5
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mflo $2
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mfhi $4
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jr $31
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sw $4, 0($6)
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.set reorder
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.end OS_AsmMult
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