OpenCores
URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] [alu.vhd] - Diff between revs 128 and 131

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 128 Rev 131
Line 12... Line 12...
library ieee;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_1164.all;
use work.mlite_pack.all;
use work.mlite_pack.all;
 
 
entity alu is
entity alu is
   generic(adder_type : string := "GENERIC";
   generic(adder_type : string := "DEFAULT";
           alu_type   : string := "GENERIC");
           alu_type   : string := "DEFAULT");
   port(a_in         : in  std_logic_vector(31 downto 0);
   port(a_in         : in  std_logic_vector(31 downto 0);
        b_in         : in  std_logic_vector(31 downto 0);
        b_in         : in  std_logic_vector(31 downto 0);
        alu_function : in  alu_function_type;
        alu_function : in  alu_function_type;
        c_alu        : out std_logic_vector(31 downto 0));
        c_alu        : out std_logic_vector(31 downto 0));
end; --alu
end; --alu
Line 32... Line 32...
   sign_ext <= '0' when alu_function = ALU_LESS_THAN else '1';
   sign_ext <= '0' when alu_function = ALU_LESS_THAN else '1';
   aa <= (a_in(31) and sign_ext) & a_in;
   aa <= (a_in(31) and sign_ext) & a_in;
   bb <= (b_in(31) and sign_ext) & b_in;
   bb <= (b_in(31) and sign_ext) & b_in;
 
 
   -- synthesis translate_off
   -- synthesis translate_off
   GENERIC_ALU: if alu_type = "GENERIC" generate
   GENERIC_ALU: if alu_type = "DEFAULT" generate
   -- synthesis translate_on
   -- synthesis translate_on
 
 
      c_alu <= sum(31 downto 0) when alu_function=ALU_ADD or alu_function=ALU_SUBTRACT else
      c_alu <= sum(31 downto 0) when alu_function=ALU_ADD or alu_function=ALU_SUBTRACT else
               ZERO(31 downto 1) & sum(32) when alu_function=ALU_LESS_THAN or alu_function=ALU_LESS_THAN_SIGNED else
               ZERO(31 downto 1) & sum(32) when alu_function=ALU_LESS_THAN or alu_function=ALU_LESS_THAN_SIGNED else
               a_in or  b_in    when alu_function=ALU_OR else
               a_in or  b_in    when alu_function=ALU_OR else
Line 61... Line 61...
      c_alu <= a_in nor b_in    when alu_function=ALU_NOR else (others => 'Z');
      c_alu <= a_in nor b_in    when alu_function=ALU_NOR else (others => 'Z');
      c_alu <= ZERO             when alu_function=ALU_NOTHING else (others => 'Z');
      c_alu <= ZERO             when alu_function=ALU_NOTHING else (others => 'Z');
 
 
   end generate;
   end generate;
 
 
   generic_adder: if adder_type = "GENERIC" generate
   generic_adder: if adder_type = "DEFAULT" generate
      sum <= bv_adder(aa, bb, do_add);
      sum <= bv_adder(aa, bb, do_add);
   end generate; --generic_adder
   end generate; --generic_adder
 
 
   --For Altera
   --For Altera
   lpm_adder: if adder_type = "ALTERA" generate
   lpm_adder: if adder_type = "ALTERA" generate

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.