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Line 1... |
#Makefile for MIPS-lite
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#Makefile for M-lite
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#for ModelSim
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#for ModelSim
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#WORK_DIR = work
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#WORK_DIR = work
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#DEP_FILE = _primary.dat
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#DEP_FILE = _primary.dat
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#COMPILE = vcom -check_synthesis
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#COMPILE = vcom -check_synthesis
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simulate: all
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simulate: all
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vhdle -s -t 40us tbench -do simili.cmd -list trace.txt
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vhdle -s -t 40us tbench -do simili.cmd -list trace.txt
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-@..\tools\tracehex.exe
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-@..\tools\tracehex.exe
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-@start ed trace2.txt
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-@start ed trace2.txt
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$(WORK_DIR)/mips_pack/$(DEP_FILE): mips_pack.vhd
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$(WORK_DIR)/mlite_pack/$(DEP_FILE): mlite_pack.vhd
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$(COMPILE) mips_pack.vhd
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$(COMPILE) mlite_pack.vhd
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$(WORK_DIR)/alu/$(DEP_FILE): mips_pack.vhd alu.vhd
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$(WORK_DIR)/alu/$(DEP_FILE): mlite_pack.vhd alu.vhd
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$(COMPILE) alu.vhd
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$(COMPILE) alu.vhd
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$(WORK_DIR)/bus_mux/$(DEP_FILE): mips_pack.vhd bus_mux.vhd
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$(WORK_DIR)/bus_mux/$(DEP_FILE): mlite_pack.vhd bus_mux.vhd
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$(COMPILE) bus_mux.vhd
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$(COMPILE) bus_mux.vhd
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$(WORK_DIR)/control/$(DEP_FILE): mips_pack.vhd control.vhd
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$(WORK_DIR)/control/$(DEP_FILE): mlite_pack.vhd control.vhd
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$(COMPILE) control.vhd
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$(COMPILE) control.vhd
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$(WORK_DIR)/mem_ctrl/$(DEP_FILE): mips_pack.vhd mem_ctrl.vhd
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$(WORK_DIR)/mem_ctrl/$(DEP_FILE): mlite_pack.vhd mem_ctrl.vhd
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$(COMPILE) mem_ctrl.vhd
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$(COMPILE) mem_ctrl.vhd
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$(WORK_DIR)/mult/$(DEP_FILE): mips_pack.vhd mult.vhd
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$(WORK_DIR)/mult/$(DEP_FILE): mlite_pack.vhd mult.vhd
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$(COMPILE) mult.vhd
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$(COMPILE) mult.vhd
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$(WORK_DIR)/pc_next/$(DEP_FILE): mips_pack.vhd pc_next.vhd
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$(WORK_DIR)/pc_next/$(DEP_FILE): mlite_pack.vhd pc_next.vhd
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$(COMPILE) pc_next.vhd
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$(COMPILE) pc_next.vhd
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$(WORK_DIR)/reg_bank/$(DEP_FILE): mips_pack.vhd reg_bank.vhd
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$(WORK_DIR)/reg_bank/$(DEP_FILE): mlite_pack.vhd reg_bank.vhd
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$(COMPILE) reg_bank.vhd
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$(COMPILE) reg_bank.vhd
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$(WORK_DIR)/shifter/$(DEP_FILE): mips_pack.vhd shifter.vhd
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$(WORK_DIR)/shifter/$(DEP_FILE): mlite_pack.vhd shifter.vhd
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$(COMPILE) shifter.vhd
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$(COMPILE) shifter.vhd
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$(WORK_DIR)/mips_cpu/$(DEP_FILE): mips_cpu.vhd \
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$(WORK_DIR)/mlite_cpu/$(DEP_FILE): mlite_cpu.vhd \
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$(WORK_DIR)/mips_pack/$(DEP_FILE) \
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$(WORK_DIR)/mlite_pack/$(DEP_FILE) \
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$(WORK_DIR)/alu/$(DEP_FILE) \
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$(WORK_DIR)/alu/$(DEP_FILE) \
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$(WORK_DIR)/bus_mux/$(DEP_FILE) \
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$(WORK_DIR)/bus_mux/$(DEP_FILE) \
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$(WORK_DIR)/control/$(DEP_FILE) \
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$(WORK_DIR)/control/$(DEP_FILE) \
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$(WORK_DIR)/mem_ctrl/$(DEP_FILE) \
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$(WORK_DIR)/mem_ctrl/$(DEP_FILE) \
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$(WORK_DIR)/mult/$(DEP_FILE) \
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$(WORK_DIR)/mult/$(DEP_FILE) \
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$(WORK_DIR)/pc_next/$(DEP_FILE) \
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$(WORK_DIR)/pc_next/$(DEP_FILE) \
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$(WORK_DIR)/reg_bank/$(DEP_FILE) \
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$(WORK_DIR)/reg_bank/$(DEP_FILE) \
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$(WORK_DIR)/shifter/$(DEP_FILE)
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$(WORK_DIR)/shifter/$(DEP_FILE)
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$(COMPILE) mips_cpu.vhd
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$(COMPILE) mlite_cpu.vhd
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$(WORK_DIR)/ram/$(DEP_FILE): mips_pack.vhd ram.vhd
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$(WORK_DIR)/ram/$(DEP_FILE): mlite_pack.vhd ram.vhd
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$(COMPILE) -87 ram.vhd
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$(COMPILE) -87 ram.vhd
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$(WORK_DIR)/tbench/$(DEP_FILE): mips_pack.vhd tbench.vhd \
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$(WORK_DIR)/tbench/$(DEP_FILE): mlite_pack.vhd tbench.vhd \
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$(WORK_DIR)/mips_pack/$(DEP_FILE) \
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$(WORK_DIR)/mlite_pack/$(DEP_FILE) \
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$(WORK_DIR)/mips_cpu/$(DEP_FILE) \
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$(WORK_DIR)/mlite_cpu/$(DEP_FILE) \
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$(WORK_DIR)/ram/$(DEP_FILE)
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$(WORK_DIR)/ram/$(DEP_FILE)
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$(COMPILE) tbench.vhd
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$(COMPILE) tbench.vhd
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