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[/] [mlite/] [trunk/] [vhdl/] [mem_ctrl.vhd] - Diff between revs 7 and 8

Rev 7	Rev 8
Line 188...	Line 188...
`next_opcode_reg <= data;`	`next_opcode_reg <= data;`
`end if;`	`end if;`
`setup_state <= setup_state_next;`	`setup_state <= setup_state_next;`
`end if;`	`end if;`

	`if reset_in = '0' then`
`opcode_out <= opcode_reg;`	`opcode_out <= opcode_reg;`
	`else`
	`opcode_out <= ZERO;`
	`end if;`
`data_read <= datab;`	`data_read <= datab;`
`pause_out <= mem_pause or pause;`	`pause_out <= mem_pause or pause;`
`mem_byte_sel <= byte_sel_next;`	`mem_byte_sel <= byte_sel_next;`
`mem_address <= address_next;`	`mem_address <= address_next;`
`if write_next = '1' and setup_state /= STATE_FETCH then`	`if write_next = '1' and setup_state /= STATE_FETCH then`