URL
https://opencores.org/ocsvn/mlite/mlite/trunk
[/] [mlite/] [trunk/] [vhdl/] [mlite_pack.vhd] - Diff between revs 194 and 202
Go to most recent revision |
Show entire file |
Details |
Blame |
View Log
Rev 194 |
Rev 202 |
Line 356... |
Line 356... |
component mlite_cpu
|
component mlite_cpu
|
generic(memory_type : string := "XILINX_16X"; --ALTERA_LPM, or DUAL_PORT_
|
generic(memory_type : string := "XILINX_16X"; --ALTERA_LPM, or DUAL_PORT_
|
mult_type : string := "DEFAULT";
|
mult_type : string := "DEFAULT";
|
shifter_type : string := "DEFAULT";
|
shifter_type : string := "DEFAULT";
|
alu_type : string := "DEFAULT";
|
alu_type : string := "DEFAULT";
|
pipeline_stages : natural := 3); --3 or 4
|
pipeline_stages : natural := 2); --2 or 3
|
port(clk : in std_logic;
|
port(clk : in std_logic;
|
reset_in : in std_logic;
|
reset_in : in std_logic;
|
intr_in : in std_logic;
|
intr_in : in std_logic;
|
|
|
mem_address : out std_logic_vector(31 downto 0);
|
mem_address : out std_logic_vector(31 downto 0);
|
© copyright 1999-2024
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.