URL https://opencores.org/ocsvn/mlite/mlite/trunk

Subversion Repositories mlite

[/] [mlite/] [trunk/] [vhdl/] [plasma.vhd] - Diff between revs 55 and 105

Rev 55	Rev 105
Line 38...	Line 38...
`signal mem_write : std_logic;`	`signal mem_write : std_logic;`
`signal mem_pause : std_logic;`	`signal mem_pause : std_logic;`
`signal mem_pause_uart : std_logic;`	`signal mem_pause_uart : std_logic;`
`signal uart_sel : std_logic;`	`signal uart_sel : std_logic;`
`begin --architecture`	`begin --architecture`
`mem_pause <= mem_pause_in or mem_pause_uart;`	`uart_sel <= '1' when mem_address(12 downto 0) = ONES(12 downto 0) and`
`uart_sel <= '1' when mem_address(12 downto 0) = ONES(12 downto 0) and mem_byte_sel /= "0000" else`	`mem_byte_sel /= "0000" else '0';`
`'0';`
`mem_data <= mem_data_r;`	`mem_data <= mem_data_r;`
	`mem_pause <= (mem_pause_in and not uart_sel) or mem_pause_uart;`

`u1_cpu: mlite_cpu`	`u1_cpu: mlite_cpu`
`generic map (memory_type => memory_type)`	`generic map (memory_type => memory_type)`
`PORT MAP (`	`PORT MAP (`
`clk => clk_in,`	`clk => clk_in,`