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[/] [mlite/] [trunk/] [vhdl/] [plasma_if.vhd] - Diff between revs 139 and 186

Rev 139	Rev 186
Line 38...	Line 38...


`architecture logic of plasma_if is`	`architecture logic of plasma_if is`

`component plasma`	`component plasma`
`generic(memory_type : string := "XILINX_X16"; --"DUAL_PORT_" "ALTERA_LPM";`	`generic(memory_type : string := "XILINX_16X"; --"DUAL_PORT_" "ALTERA_LPM";`
`log_file : string := "UNUSED");`	`log_file : string := "UNUSED");`
`port(clk : in std_logic;`	`port(clk : in std_logic;`
`reset : in std_logic;`	`reset : in std_logic;`
`uart_write : out std_logic;`	`uart_write : out std_logic;`
`uart_read : in std_logic;`	`uart_read : in std_logic;`