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[/] [mlite/] [trunk/] [vhdl/] [ram_xilinx.vhd] - Diff between revs 139 and 181
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| Rev 139 |
Rev 181 |
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-- Implements the RAM for Spartan 3 Xilinx FPGA
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-- Implements the RAM for Spartan 3 Xilinx FPGA
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--
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--
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-- Compile the MIPS C and assembly code into "text.exe".
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-- Compile the MIPS C and assembly code into "text.exe".
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-- Run convert.exe to change "text.exe" to "code.txt" which
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-- Run convert.exe to change "text.exe" to "code.txt" which
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-- will contain the hex values of the opcodes.
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-- will contain the hex values of the opcodes.
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-- Next run "run_image ram_xilinx.vhd code.txt ram_image.vhd",
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-- Next run "ram_image ram_xilinx.vhd code.txt ram_image.vhd",
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-- to create the "ram_image.vhd" file that will have the opcodes
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-- to create the "ram_image.vhd" file that will have the opcodes
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-- corectly placed inside the INIT_00 => strings.
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-- correctly placed inside the INIT_00 => strings.
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-- Then include ram_image.vhd in the simulation/synthesis.
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-- Then include ram_image.vhd in the simulation/synthesis.
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---------------------------------------------------------------------
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---------------------------------------------------------------------
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library ieee;
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_misc.all;
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use ieee.std_logic_misc.all;
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