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[/] [mlite/] [trunk/] [vhdl/] [ram_xilinx.vhd] - Diff between revs 181 and 262

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Rev 181 Rev 262
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-- COPYRIGHT: Software placed into the public domain by the author.
-- COPYRIGHT: Software placed into the public domain by the author.
--    Software 'as is' without warranty.  Author liable for nothing.
--    Software 'as is' without warranty.  Author liable for nothing.
-- DESCRIPTION:
-- DESCRIPTION:
--    Implements the RAM for Spartan 3 Xilinx FPGA
--    Implements the RAM for Spartan 3 Xilinx FPGA
--
--
--    Compile the MIPS C and assembly code into "text.exe".
--    Compile the MIPS C and assembly code into "test.axf".
--    Run convert.exe to change "text.exe" to "code.txt" which
--    Run convert.exe to change "test.axf" to "code.txt" which
--    will contain the hex values of the opcodes.
--    will contain the hex values of the opcodes.
--    Next run "ram_image ram_xilinx.vhd code.txt ram_image.vhd",
--    Next run "ram_image ram_xilinx.vhd code.txt ram_image.vhd",
--    to create the "ram_image.vhd" file that will have the opcodes
--    to create the "ram_image.vhd" file that will have the opcodes
--    correctly placed inside the INIT_00 => strings.
--    correctly placed inside the INIT_00 => strings.
--    Then include ram_image.vhd in the simulation/synthesis.
--    Then include ram_image.vhd in the simulation/synthesis.

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