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--   -- Option #5

   -- Option #5

--   -- Altera LPM_RAM_DP

   -- Altera LPM_RAM_DP

--   altera_mem:

   -- Xilinx users may need to comment out this section!!!

--   if memory_type = "ALTERA" generate

   altera_mem:

--      lpm_ram_dp_component1 : lpm_ram_dp

   if memory_type = "ALTERA" generate

--      GENERIC MAP (

      lpm_ram_dp_component1 : lpm_ram_dp

--         lpm_width => 32,

      GENERIC MAP (

--         lpm_widthad => 5,

         lpm_width => 32,

--         rden_used => "FALSE",

         lpm_widthad => 5,

--         intended_device_family => "UNUSED",

         rden_used => "FALSE",

--         lpm_indata => "REGISTERED",

         intended_device_family => "UNUSED",

--         lpm_wraddress_control => "REGISTERED",

         lpm_indata => "REGISTERED",

--         lpm_rdaddress_control => "UNREGISTERED",

         lpm_wraddress_control => "REGISTERED",

--         lpm_outdata => "UNREGISTERED",

         lpm_rdaddress_control => "UNREGISTERED",

--         use_eab => "ON",

         lpm_outdata => "UNREGISTERED",

--         lpm_type => "LPM_RAM_DP"

         use_eab => "ON",

--      )

         lpm_type => "LPM_RAM_DP"

--      PORT MAP (

      )

--         wren => write_enable,

      PORT MAP (

--         wrclock => clk,

         wren => write_enable,

--         data => reg_dest_new,

         wrclock => clk,

--         rdaddress => addr_a1,

         data => reg_dest_new,

--         wraddress => addr_b,

         rdaddress => addr_a1,

--         q => data_out1

         wraddress => addr_b,

--      );

         q => data_out1

--      lpm_ram_dp_component2 : lpm_ram_dp

      );

--      GENERIC MAP (

      lpm_ram_dp_component2 : lpm_ram_dp

--         lpm_width => 32,

      GENERIC MAP (

--         lpm_widthad => 5,

         lpm_width => 32,

--         rden_used => "FALSE",

         lpm_widthad => 5,

--         intended_device_family => "UNUSED",

         rden_used => "FALSE",

--         lpm_indata => "REGISTERED",

         intended_device_family => "UNUSED",

--         lpm_wraddress_control => "REGISTERED",

         lpm_indata => "REGISTERED",

--         lpm_rdaddress_control => "UNREGISTERED",

         lpm_wraddress_control => "REGISTERED",

--         lpm_outdata => "UNREGISTERED",

         lpm_rdaddress_control => "UNREGISTERED",

--         use_eab => "ON",

         lpm_outdata => "UNREGISTERED",

--         lpm_type => "LPM_RAM_DP"

         use_eab => "ON",

--      )

         lpm_type => "LPM_RAM_DP"

--      PORT MAP (

      )

--         wren => write_enable,

      PORT MAP (

--         wrclock => clk,

         wren => write_enable,

--         data => reg_dest_new,

         wrclock => clk,

--         rdaddress => addr_a2,

         data => reg_dest_new,

--         wraddress => addr_b,

         rdaddress => addr_a2,

--         q => data_out2

         wraddress => addr_b,

--      );

         q => data_out2

--   end generate; --altera_mem

      );