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[/] [mod_mult_exp/] [trunk/] [rtl/] [vhdl/] [commons/] [properties_32bit.vhd] - Diff between revs 3 and 5

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constant count_down : STD_LOGIC_VECTOR(1 downto 0) := "01";
constant count_down : STD_LOGIC_VECTOR(1 downto 0) := "01";
constant do_nothing : STD_LOGIC_VECTOR(1 downto 0) := "11";
constant do_nothing : STD_LOGIC_VECTOR(1 downto 0) := "11";
 
 
type multiplier_states is (NOP, CALCULATE_START, STOP);
type multiplier_states is (NOP, CALCULATE_START, STOP);
 
 
type finalizer_states is (FIRST_RUN, NOP,
type exponentiator_states is (FIRST_RUN, NOP,
    READ_DATA_HASH_M, READ_DATA_C1, READ_DATA_N, READ_DATA_E, READ_DATA_D2, READ_DATA_CINV,
    READ_DATA_BASE, READ_DATA_MODULUS, READ_DATA_EXPONENT, READ_DATA_RESIDUUM,
    COUNT_C2, EXP_Z_C2, SAVE_EXP_Z_C2, EXP_P_C2, SAVE_EXP_P_C2, EXP_CONTROL_C2, EXP_END_C2, SAVE_EXP_MULT_C2,
    COUNT_POWER, EXP_Z, SAVE_EXP_Z, EXP_P, SAVE_EXP_P, EXP_CONTROL, EXP_END, SAVE_EXP_MULT,
         COUNT_Cinv, MULT_CINV, SAVE_MULT_CINV,
    INFO_RESULT, SHOW_RESULT);
         COUNT_C, MULT_C, SAVE_MULT_C,
 
         COUNT_M, EXP_Z_M, SAVE_EXP_Z_M, EXP_P_M, SAVE_EXP_P_M, EXP_CONTROL_M, EXP_END_M, SAVE_EXP_M,
 
    MAKE_COMPARE, COMP, COMPARE_RESULT,
 
         INFO_RESULT, SHOW_RESULT, FAIL_STATE);
 
 
 
type fin_data_ctrl_states is (NOP, PAD_FAIL, PAD_FAIL_NOP, PAD_FAIL_DECODE,
type fin_data_ctrl_states is (NOP, PAD_FAIL, PAD_FAIL_NOP, PAD_FAIL_DECODE,
    DECODE_IN, READ_DATA, DECODE_READ, DECODE_READ_PROP, MAKE_FINALIZE, OUTPUT_DATA, INFO_STATE,
    DECODE_IN, READ_DATA, DECODE_READ, DECODE_READ_PROP, MAKE_FINALIZE, OUTPUT_DATA, INFO_STATE,
    TEMPORARY_STATE, DATA_TO_OUT_PROPAGATE, DATA_TO_OUT_PROPAGATE2, MOVE_DATA, MOVE_OUTPUT_DATA);
    TEMPORARY_STATE, DATA_TO_OUT_PROPAGATE, DATA_TO_OUT_PROPAGATE2, MOVE_DATA, MOVE_OUTPUT_DATA);
 
 
---- mnemonics for finalizer
---- mnemonics for exponentiator
constant mn_read_hash_m      : STD_LOGIC_VECTOR(7 downto 0) := "00000001";
constant mn_read_base        : STD_LOGIC_VECTOR(2 downto 0) := "000";
constant mn_read_c1          : STD_LOGIC_VECTOR(7 downto 0) := "00000010";
constant mn_read_modulus     : STD_LOGIC_VECTOR(2 downto 0) := "001";
constant mn_read_n           : STD_LOGIC_VECTOR(7 downto 0) := "00000011";
constant mn_read_exponent    : STD_LOGIC_VECTOR(2 downto 0) := "010";
constant mn_read_e           : STD_LOGIC_VECTOR(7 downto 0) := "00000100";
constant mn_read_residuum    : STD_LOGIC_VECTOR(2 downto 0) := "011";
constant mn_read_d2          : STD_LOGIC_VECTOR(7 downto 0) := "00000110";
constant mn_count_power      : STD_LOGIC_VECTOR(2 downto 0) := "100";
constant mn_read_cinv        : STD_LOGIC_VECTOR(7 downto 0) := "00000111";
constant mn_show_result      : STD_LOGIC_VECTOR(2 downto 0) := "101";
constant mn_finalize         : STD_LOGIC_VECTOR(7 downto 0) := "00001000";
constant mn_show_status      : STD_LOGIC_VECTOR(2 downto 0) := "110";
constant mn_show_result      : STD_LOGIC_VECTOR(7 downto 0) := "00001001";
constant mn_prepare_for_data : STD_LOGIC_VECTOR(2 downto 0) := "111";
constant mn_show_status      : STD_LOGIC_VECTOR(7 downto 0) := "00001010";
 
constant mn_prepare_for_data : STD_LOGIC_VECTOR(7 downto 0) := "00001011";
 
 
 
---- addresses for memory data
---- addresses for memory data
constant addr_hashM  : STD_LOGIC_VECTOR(3 downto 0) := "0000";
constant addr_base     : STD_LOGIC_VECTOR(3 downto 0) := "0000";
constant addr_c1     : STD_LOGIC_VECTOR(3 downto 0) := "0001";
constant addr_modulus  : STD_LOGIC_VECTOR(3 downto 0) := "0010";
constant addr_N      : STD_LOGIC_VECTOR(3 downto 0) := "0010";
constant addr_exponent : STD_LOGIC_VECTOR(3 downto 0) := "0100";
constant addr_E      : STD_LOGIC_VECTOR(3 downto 0) := "0011";
constant addr_power    : STD_LOGIC_VECTOR(3 downto 0) := "0101";
constant addr_d2     : STD_LOGIC_VECTOR(3 downto 0) := "0100";
constant addr_residuum : STD_LOGIC_VECTOR(3 downto 0) := "1000";
constant addr_c2     : STD_LOGIC_VECTOR(3 downto 0) := "0101";
 
constant addr_c      : STD_LOGIC_VECTOR(3 downto 0) := "0110";
 
constant addr_hashMc : STD_LOGIC_VECTOR(3 downto 0) := "0111";
 
constant addr_cinv   : STD_LOGIC_VECTOR(3 downto 0) := "1000";
 
constant addr_one    : STD_LOGIC_VECTOR(3 downto 0) := "1001";
constant addr_one    : STD_LOGIC_VECTOR(3 downto 0) := "1001";
constant addr_unused : STD_LOGIC_VECTOR(3 downto 0) := "1101";
constant addr_unused : STD_LOGIC_VECTOR(3 downto 0) := "1101";
constant addr_z      : STD_LOGIC_VECTOR(3 downto 0) := "1110";
constant addr_z      : STD_LOGIC_VECTOR(3 downto 0) := "1110";
constant addr_p      : STD_LOGIC_VECTOR(3 downto 0) := "1111";
constant addr_p      : STD_LOGIC_VECTOR(3 downto 0) := "1111";
 
 

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