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https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk
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| Rev 69 |
Rev 89 |
| Line 136... |
Line 136... |
ramblock: dpram_generic
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ramblock: dpram_generic
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generic map(
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generic map(
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depth => depth+1
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depth => depth+1
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)
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)
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port map(
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port map(
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clk => clk,
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-- write port
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-- write port
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waddr => wr_addr,
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clkA => clk,
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we => push_i_d,
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waddrA => wr_addr,
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din => din,
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weA => push_i_d,
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dinA => din,
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-- read port
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-- read port
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raddr => rd_addr,
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clkB => clk,
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dout => dout
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raddrB => rd_addr,
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doutB => dout
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);
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);
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end arch;
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end arch;
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No newline at end of file
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No newline at end of file
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