Subversion Repositories mod_sim_exp

use ieee.std_logic_unsigned.all;

use ieee.std_logic_unsigned.all;

use ieee.std_logic_arith.all;

use ieee.std_logic_arith.all;

library mod_sim_exp;

library mod_sim_exp;

use mod_sim_exp.std_functions.all;

use mod_sim_exp.std_functions.all;

-- altera infers ramblocks from a depth of 9 (or 2 with any ram size recognition option on) 

-- altera infers ramblocks from a depth of 9 (or 2 with any ram size recognition option on) 

--              and width 64,128,256,512,1024

--              and width 64,128,256,512,1024

-- xilinx infers ramblocks from a depth of 2 and width 32,64,128,256,512,1024

-- xilinx infers ramblocks from a depth of 2 and width 32,64,128,256,512,1024

entity dpramblock_asym is

entity dpramblock_asym is

  signal dout_RAM : word_array;

  signal dout_RAM : word_array;

begin

begin

  -- generate (width/32) blocks of 32-bit ram with a given depth

  -- generate (width/32) blocks of 32-bit ram with a given depth

  -- these rams outputs are concatenated to a width-bit signal

  -- these rams outputs are concatenated to a width-bit signal

  ramblocks : for i in 0 to nrRAMs-1 generate

  ramblocks : for i in 0 to nrRAMs-1 generate

    generic map(

    generic map(

      rddepth => depth,

      rddepth => depth,

      wrwidth => RAMwrwidth,

      wrwidth => RAMwrwidth,

      device  => device

      device  => device

    )

    )