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[/] [modular_oscilloscope/] [trunk/] [hdl/] [ctrl/] [tbench/] [data_skipper_tbench_text.vhd] - Diff between revs 36 and 38

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Rev 36 Rev 38
Line 51... Line 51...
    -- selector from register
    -- selector from register
    selector_I:       inout   std_logic_vector(SELECTOR_WIDTH-1 downto 0);
    selector_I:       inout   std_logic_vector(SELECTOR_WIDTH-1 downto 0);
    -- enable from register 
    -- enable from register 
    enable_skipper_I: inout   std_logic;
    enable_skipper_I: inout   std_logic;
    -- common signals
    -- common signals
    reset_I, clk_I:   inout   std_logic
    reset_I, clk_I:   inout   std_logic;
 
    first_channel_I:  inout   std_logic
  );
  );
 
 
end stimulus;
end stimulus;
 
 
architecture STIMULATOR of stimulus is
architecture STIMULATOR of stimulus is
Line 78... Line 79...
  signal clk_Offset : time := 0 ns;
  signal clk_Offset : time := 0 ns;
 
 
 
 
 
 
begin
begin
  --------------------------------------------------------------------------------------------------
 
  -- Status Control block.
 
  process
 
    -- variable good : boolean;
 
  begin
 
    wait until tb_ParameterInitFlag;
 
    tb_status <= TB_ONCE;
 
    wait for 50000 ns;
 
    tb_status <= TB_DONE;  -- End of simulation
 
    wait;
 
  end process;
 
 
 
  --------------------------------------------------------------------------------------------------
  --------------------------------------------------------------------------------------------------
  -- Parm Assignment Block
  -- Parm Assignment Block
  AssignParms : process
  AssignParms : process
    variable clk_MinHL_real :   real;
    variable clk_MinHL_real :   real;
Line 158... Line 148...
  --===============================================================================================>
  --===============================================================================================>
 
 
 
 
  --<===============================================================================================
  --<===============================================================================================
  -- Sequence: Unclocked
  -- Sequence: Unclocked
  Unclocked : process
  P_FirstCh: process
 
  begin
 
    wait until tb_ParameterInitFlag;
 
    first_channel_I <= '0';
 
      wait for T*1.5 ns;
 
    while tb_status = TB_ONCE loop
 
      first_channel_I <= '1';
 
        wait for T * 1 ns; --<delay>
 
      first_channel_I <= '0';
 
        wait for 4.0 * T * 1 ns;
 
    end loop;
 
 
 
    wait;
 
  end process;
 
 
 
  P_Unclocked : process
    variable i: natural range 0 to 500;
    variable i: natural range 0 to 500;
  begin
  begin
 
       wait until tb_ParameterInitFlag;
 
    tb_status <= TB_ONCE;
 
 
 
 
    -- Initial
    -- Initial
    reset_I <= '1' ;
    reset_I <= '1' ;
    enable_skipper_I <= '0';
 
    ack_I <= '0'; stb_I <= '0';
    ack_I <= '0'; stb_I <= '0';
 
    enable_skipper_I <= '1';
    selector_I <= (others => '0');
    selector_I <= (others => '0');
      wait for 15 ns; --<delay>
      wait for T*1.5 ns; --<delay>
 
 
    -- w/o en_skip
    -- w/o en_skip
    reset_I <= '0';
    reset_I <= '0';
      wait for T * 1 ns; --<delay>
      wait for T * 1 ns; --<delay>
 
 
Line 190... Line 198...
 
 
    ack_I <= '1'; stb_I <= '0';
    ack_I <= '1'; stb_I <= '0';
      wait for 4.0 * T * 1 ns; --<delay>
      wait for 4.0 * T * 1 ns; --<delay>
 
 
    ack_I <= '0'; stb_I <= '1';
    ack_I <= '0'; stb_I <= '1';
      wait for 4.0*T * 1 ns; --<delay>
      wait for 4.0*T *4.0* 1 ns; --<delay>
 
 
    -- selector_I /= 0
    -- selector_I /= 0
    ack_I <= '1'; stb_I <= '1'; selector_I <= std_logic_vector(unsigned(selector_I) + 1);
    ack_I <= '1'; stb_I <= '1'; selector_I <= std_logic_vector(unsigned(selector_I) + 1);
      wait for 20.0*T * 1 ns; --<delay>
      wait for 20.0*T*4.0 * 1 ns; --<delay>
 
 
    selector_I <= std_logic_vector(to_unsigned( integer(2**real(selector_I'length )/10.0), selector_I'length ));
    selector_I <= std_logic_vector(to_unsigned( integer(2**real(selector_I'length )/10.0), selector_I'length ));
      wait for 1000.0*T * 1 ns; --<delay>
      wait for 4000.0*T*4.0 * 1 ns;
 
 
    selector_I <= std_logic_vector(to_unsigned( integer(2**real(selector_I'length )/4.0), selector_I'length ));
    selector_I <= std_logic_vector(to_unsigned( integer(2**real(selector_I'length )/4.0), selector_I'length ));
      wait for 2000.0*T * 1 ns; --<delay>
      wait for 4000.0*T*4.0 * 1 ns; --<delay>
 
 
    selector_I <= std_logic_vector(to_unsigned( integer(2**real(selector_I'length )-1.0), selector_I'length ));
    selector_I <= std_logic_vector(to_unsigned( integer(2**real(selector_I'length )-1.0), selector_I'length ));
      wait for 100000.0*T * 1 ns; --<delay>
      wait for 100000.0*T *4.0* 1 ns; --<delay>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
    tb_status <= TB_DONE;  -- End of simulation
    wait;
    wait;
 
 
 
 
  end process;
  end process;
  --===============================================================================================>
  --===============================================================================================>
 
 
 
 
end STIMULATOR;
end STIMULATOR;
Line 251... Line 258...
    signal selector_I:          std_logic_vector(SELECTOR_WIDTH-1 downto 0);
    signal selector_I:          std_logic_vector(SELECTOR_WIDTH-1 downto 0);
    -- enable from register 
    -- enable from register 
    signal enable_skipper_I:    std_logic;
    signal enable_skipper_I:    std_logic;
    -- common signals
    -- common signals
    signal reset_I, clk_I:      std_logic;
    signal reset_I, clk_I:      std_logic;
 
    signal first_channel_I:     std_logic;
 
 
begin
begin
  --------------------------------------------------------------------------------------------------
  --------------------------------------------------------------------------------------------------
  -- Instantiation of Stimulus.
  -- Instantiation of Stimulus.
  U_stimulus_0 : entity work.stimulus --<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--
  U_stimulus_0 : entity work.stimulus --<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--
Line 265... Line 273...
    ack_I => ack_I,
    ack_I => ack_I,
    stb_I => stb_I,
    stb_I => stb_I,
    selector_I => selector_I,
    selector_I => selector_I,
    enable_skipper_I => enable_skipper_I,
    enable_skipper_I => enable_skipper_I,
    reset_I => reset_I,
    reset_I => reset_I,
    clk_I => clk_I
    clk_I => clk_I,
 
    first_channel_I => first_channel_I
  );
  );
 
 
  --------------------------------------------------------------------------------------------------
  --------------------------------------------------------------------------------------------------
  -- Instantiation of Model Under Test.
  -- Instantiation of Model Under Test.
  U_skip_0 : entity work.data_skipper --<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--
  U_skip_0 : entity work.data_skipper --<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--<--
Line 281... Line 290...
    ack_I => ack_I,
    ack_I => ack_I,
    stb_I => stb_I,
    stb_I => stb_I,
    selector_I => selector_I,
    selector_I => selector_I,
    enable_skipper_I => enable_skipper_I,
    enable_skipper_I => enable_skipper_I,
    reset_I => reset_I,
    reset_I => reset_I,
 
    first_channel_I => first_channel_I,
    clk_I => clk_I
    clk_I => clk_I
  );
  );
end tbGeneratedCode;
end tbGeneratedCode;
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