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signal offset_sign: std_logic;
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signal offset_sign: std_logic;
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signal truncate: std_logic;
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signal truncate: std_logic;
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signal selected_address: std_logic_vector(MEM_ADD_WIDTH -1 downto 0);
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signal selected_address: std_logic_vector(MEM_ADD_WIDTH -1 downto 0);
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signal selected_address_reg: std_logic_vector(MEM_ADD_WIDTH -1 downto 0);
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signal selected_address_reg: std_logic_vector(MEM_ADD_WIDTH -1 downto 0);
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signal full_buffer: std_logic;
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begin
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begin
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--------------------------------------------------------------------------------------------------
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--------------------------------------------------------------------------------------------------
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-- Output address selection
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-- Output address selection
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add_plus_off_plus_fa_sign <= add_plus_off_plus_fa (MEM_ADD_WIDTH);
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add_plus_off_plus_fa_sign <= add_plus_off_plus_fa (MEM_ADD_WIDTH);
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truncate <= (offset_sign and add_plus_off_sign) or
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truncate <= (offset_sign and add_plus_off_sign) or
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(not(offset_sign) and not(add_plus_off_plus_fa_sign));
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(not(offset_sign) and not(add_plus_off_plus_fa_sign));
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with truncate select
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with truncate select
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selected_address <= std_logic_vector(add_plus_off_plus_fa(MEM_ADD_WIDTH - 1 downto 0))
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selected_address <= std_logic_vector(add_plus_off_plus_fa(MEM_ADD_WIDTH - 1 downto 0))
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when '1',
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when '1',
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std_logic_vector(add_plus_off(MEM_ADD_WIDTH - 1 downto 0))
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std_logic_vector(add_plus_off(MEM_ADD_WIDTH - 1 downto 0))
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when others;
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when others;
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selected_address_reg <= (others => '0');
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selected_address_reg <= (others => '0');
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elsif enable_I = '1' then
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elsif enable_I = '1' then
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if channel_I = trig_channel_I then
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if channel_I = trig_channel_I then
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if (higher_reg = '0' xor falling_I = '1') and
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if (higher_reg = '0' xor falling_I = '1') and
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(higher = '1' xor falling_I = '1') and pre_trigger = '0'
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(higher = '1' xor falling_I = '1') and pre_trigger = '0' and full_buffer = '1'
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then -- trigger!
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then -- trigger!
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pre_trigger <= '1';
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pre_trigger <= '1';
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selected_address_reg <= selected_address;
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selected_address_reg <= selected_address;
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if offset_sign = '1' or unsigned(offset_I) = 0 then
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if offset_sign = '1' or unsigned(offset_I) = 0 then
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trigger_O <= '1';
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trigger_O <= '1';
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end if;
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end if;
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end if;
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end if;
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higher_reg <= higher;
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higher_reg <= higher; -- higher_reg will be the previous higher
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end if;
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end if;
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if pre_trigger = '1' and selected_address_reg = address_I then
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if pre_trigger = '1' and selected_address_reg = address_I then
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-- if offset > 0 then trigger will wait until address_I equals trigger address plus offset
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-- if offset > 0 then trigger will wait until address_I equals trigger address plus offset
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trigger_O <= '1';
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trigger_O <= '1';
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Line 145... |
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end if;
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end if;
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end if;
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end if;
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end process;
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end process;
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-- When using negative offset for buffer, buffer must be filled before set trigger
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P_wait_buffer_full: process (clk_I)
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begin
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if clk_I'event and clk_I = '1' then
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if reset_I = '1' then
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full_buffer <= '0';
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elsif enable_I = '1' and (offset_sign = '0' or add_plus_off_sign = '0') and
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full_buffer <= '0' then
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full_buffer <= '1';
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end if;
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end if;
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end process;
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-- t pt f /f xor1 xor2 and
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-- t pt f /f xor1 xor2 and
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-- 000 1 0 1
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-- 000 1 0 1
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-- 001 0 1 0
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-- 001 0 1 0
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-- 010 1 0 0
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-- 010 1 0 0
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-- 100 1 1 1 1
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-- 100 1 1 1 1
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-- 101 0 0 0
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-- 101 0 0 0
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-- 110 1 1 0
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-- 110 1 1 0
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-- 111 0 0 1
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-- 111 0 0 1
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end architecture;
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end architecture;
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No newline at end of file
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No newline at end of file
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