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[/] [modular_oscilloscope/] [trunk/] [hdl/] [epp/] [eppwbn_ctrl.vhd] - Diff between revs 14 and 15

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Rev 14 Rev 15
Line 11... Line 11...
--|   This can be easily modified to control other modes besides the EPP.
--|   This can be easily modified to control other modes besides the EPP.
-------------------------------------------------------------------------------
-------------------------------------------------------------------------------
--| File history:
--| File history:
--|     0.01    | nov-2008 | First testing release
--|     0.01    | nov-2008 | First testing release
--|   0.20  | dic-2008 | Customs signals without tri-state
--|   0.20  | dic-2008 | Customs signals without tri-state
--|   0.21  | jan-2009 | Asinc RST_I for Wishbone compatibility
--|   0.21  | jan-2009 | Sinc reset
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
--| Copyright ® 2008, Facundo Aguilera.
--| Copyright ® 2008, Facundo Aguilera.
--|
--|
--| This VHDL design file is an open design; you can redistribute it and/or
--| This VHDL design file is an open design; you can redistribute it and/or
--| modify it and/or implement it after contacting the author.
--| modify it and/or implement it after contacting the author.
Line 91... Line 91...
 
 
  ----------------------------------------------------------------------------------------
  ----------------------------------------------------------------------------------------
  -- estado siguiente
  -- estado siguiente
  P_state_comb: process(present_state, next_state, RST_I, nSelectIn, nAutoFd, ext_req_val, nInit, nStrobe) begin
  P_state_comb: process(present_state, next_state, RST_I, nSelectIn, nAutoFd, ext_req_val, nInit, nStrobe) begin
 
 
 
    if RST_I = '1' then
 
      next_state <= st_compatibility_idle;
 
    else
    case present_state is
    case present_state is
 
 
      when st_compatibility_idle =>
      when st_compatibility_idle =>
        PError <= '0';
        PError <= '0';
        nFault <= '1';
        nFault <= '1';
Line 165... Line 167...
        -- Finalizaci?n del modo EPP
        -- Finalizaci?n del modo EPP
 
 
        next_state <= st_epp_mode;
        next_state <= st_epp_mode;
                -- Se sale de este estado en forma asíncrona ya que esta acción
                -- Se sale de este estado en forma asíncrona ya que esta acción
    end case;   --  no tiene handshake.
    end case;   --  no tiene handshake.
 
    end if;
 
 
  end process P_state_comb;
  end process P_state_comb;
 
 
 
 
 
 

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